Patents Examined by Brian Assessor
-
Patent number: 7370240Abstract: A method, apparatus, and computer instructions for preserving trace data in a logical partitioned data processing system. A call is received from a partition in a plurality of partitions to register a buffer in the partition for the trace data. The call includes a pointer to the buffer. The buffer is associated with a trace routine in platform firmware. The trace routine stores the trace data for calls made by the partition to the platform firmware in the buffer.Type: GrantFiled: April 29, 2004Date of Patent: May 6, 2008Assignee: International Business Machines CorporationInventors: George John Dawkins, Alongkorn Kitamorn, Ashwini Kulkarni, Gordon D. McIntosh, Gary Lee Ruzek
-
Patent number: 7328374Abstract: A method, apparatus, and computer instructions in a processor for checking assertions. A determination by the processor is made as to whether metadata for an assertion is associated with the memory location, in response to detecting a change in data in a memory location. The data to the assertion is compared by the processor, in response to the metadata being associated with the memory location. An error is generated by the processor if the assertion is invalid, with respect to the data. The processor checks the assertions for validity.Type: GrantFiled: April 29, 2004Date of Patent: February 5, 2008Assignee: International Business Machines CorporationInventors: William Preston Alexander, III, Robert Tod Dimpsey, Frank Eliot Levine, Robert John Urquhart
-
Patent number: 7305586Abstract: A microprocessor includes an externally accessible port and a serial communication bus connected to the port. An execution pipeline of the processor includes a pipeline satellite circuit coupling the pipeline to the bus. The satellite enables an external agent to provide an instruction directly to the pipeline via the serial bus. A dedicated register and register satellite circuit couple the register to the communication bus. The execution pipeline can access the dedicated register during execution of the instruction. In this manner, the satellite circuits enable the external agent to access architected state. The communication bus enables access to the satellites while a system clock to the processor remains active. In one embodiment, the pipeline satellite accesses the pipeline “downstream” of the decode stage such that the set of instructions that may be “rammed” into the pipeline is not limited to the set of instructions that the decode stage can generate.Type: GrantFiled: April 25, 2003Date of Patent: December 4, 2007Assignee: International Business Machines CorporationInventors: Richard William Doing, Michael Stephen Floyd, Ronald Nick Kalla, John Wesley Ward, III
-
Patent number: 7281172Abstract: A fault information collection program capable of accurately determining redundancy of information related to an identical fault even in cases where information indicating the same fault of the same target of monitoring is received from multiple devices. When new fault information including fault detection date and time is input, the latest fault information indicating a fault related to the fault identical with that of the new fault information is acquired from a message information storage means storing a plurality of past fault information including detection dates and times of faults. It is then determined whether or not a predetermined messaging interval has elapsed since the fault detection date and time indicated by the latest fault information until the fault detection date and time indicated by the new fault information. If the messaging interval has elapsed, the new fault information is stored in the message information storage means as valid fault information.Type: GrantFiled: April 24, 2003Date of Patent: October 9, 2007Assignee: Fujitsu LimitedInventor: Mikiya Chujo
-
Patent number: 7266717Abstract: This invention provides a system and method for selecting and communicating a single disk (a “coredump disk”) for use in a coredump procedure by a failed file server (or filer). A selection method on the failed filer determines the “best candidate” coredump disk according to a predetermined set of criteria. For example, the available disks that can receive coredump data are located and ordered so as to prefer disks that best match the coredump data size requirement, are least likely to be needed for normal service by the server; and require the least preparation to receive coredump data. Appropriate attributes on the selected coredump disk are written to indicate that a coredump is in progress, and the location of the coredump data. Upon reboot of the failed filer (or takeover by a cluster partner), the coredump disk is identified and the coredump data recovered by reading back appropriate attributes.Type: GrantFiled: January 26, 2004Date of Patent: September 4, 2007Assignee: Network Appliance, Inc.Inventors: Loellyn J. Cassell, Brian Parkison, David Brittain Bolen, Susan M. Coatney
-
Patent number: 7249282Abstract: A system including a processor is energized from a source which is subject to power failure. To allow the state of the system to be restored after the power failure, at least portions of the volatile data of the processor are stored in non-volatile electrically erasable programmable read-only memory (Eeprom). In order to effectuate the data transfer, storage capacitors must provide power to the Eeprom and to the processor. In order to minimize the amount of storage capacitance, the processor power is maintained only until the data to be stored is transferred to the buffer of the Eeprom. Eeprom power is maintained until after a later time at which the buffer transfers the data to non-volatile storage of the Eeprom.Type: GrantFiled: January 9, 2003Date of Patent: July 24, 2007Assignee: Thomson LicensingInventor: William John Testin
-
Patent number: 7249281Abstract: A method and system for backing up and restoring a data set on a node of a distributed system prevents conflicts in data replication caused by restoration from backup data. Before a node is backed up, state data of the data set of the node are set to mark the data set as “backed up.” The data set also stores a lowest serial number for uncommitted changes. A snapshot of the data set, including the state data, of the node is then taken to provide a backup copy. When the backup copy is later used to restore the data set of the node, the “backed up” value of the state data of the restored data set serves as a notification to the replication server of the node that the data set has been restored, so that the replication server will switch to a new Node ID for labeling new changes for replication to other nodes in the distributed system.Type: GrantFiled: July 28, 2003Date of Patent: July 24, 2007Assignee: Microsoft CorporationInventors: Brett A. Shirley, Gregory C. Johnson
-
Patent number: 7246258Abstract: A system for minimizing downtime in an appliance-based business continuance architecture is provided. The system includes at least one primary data storage and least one primary host machine. The system includes an intercept agent to intercept primary host machine data requests, and to collect information associated with the intercepted data requests. Moreover, at least one business continuance appliance in communication with the primary host machine and in communication with a remote backup site is provided. The appliance receives information associated with the intercepted data requests from the intercept agent. In addition, a local cache is included within the business continuance appliance. The local cache maintains copies of primary data storage according to the information received. Furthermore, the remote site is provided with the intercepted data requests via the business continuance appliance, wherein the remote site maintains a backup of the primary data storage.Type: GrantFiled: April 28, 2004Date of Patent: July 17, 2007Assignee: Lenovo (Singapore) Pte. Ltd.Inventors: Ying Chen, Binny Sher Gill
-
Patent number: 7243265Abstract: Methods, systems, and articles of manufacture consistent with the present invention train a real-time health-monitor for a computer-based system while simultaneously monitoring the health of the system. A plurality of signals that each describe an operating condition of a subject data processing system are monitored in real-time. It is determined whether there is a problem with the subject data processing system by comparing at least one of the monitored signals to a corresponding at least one signal in a known signal dataset. The known signal dataset includes a signal value for at least one signal that describes an operating condition of one of a plurality of subject data processing systems. A new signal dataset having an entry for each monitored signal and a corresponding signal value is prepared simultaneously with monitoring the plurality of signals and determining whether there is a problem.Type: GrantFiled: October 22, 2003Date of Patent: July 10, 2007Assignee: Sun Microsystems, Inc.Inventors: Michael J. Wookey, Kenneth C. Gross, Lawrence G. Votta, Jr.
-
Patent number: 7213174Abstract: A method and an analyzer for producing information associated with a process is disclosed. Information from information sources that associate with the process is processed to classify the information into characteristic states. Results of the classification are then analyzed for producing information associated with at least one root cause for an event by means of at least one analyzing technology that is capable of reasoning under at least one uncertainty.Type: GrantFiled: June 5, 2002Date of Patent: May 1, 2007Assignee: ABB ABInventors: Erik Dahlquist, Galia Weidl
-
Patent number: 7213170Abstract: One embodiment disclosed relates to a method of providing CPU functional testing. Operations are executed on multiple functional units of a same type in the CPU. The outputs of the multiple functional units are automatically compared. The results of the comparison are checked only for redundant operations. Another embodiment disclosed relates to a microprocessor with built-in functional testing capability. The microprocessor includes multiple functional units of a same type and registers that receive outputs from the multiple functional units. In addition, comparator circuitry is built-in that also receives the outputs from the multiple functional units and compares the outputs to provide functional testing.Type: GrantFiled: September 10, 2003Date of Patent: May 1, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Dale John Shidla, Andrew Harvey Barr, Ken Gary Pomaranski
-
Patent number: 7210071Abstract: In a stacked system, errors detected at a user application interface of one or more host systems are associated with root cause errors at a stack level below a virtualization layer by detecting an error at a user application interface; identifying an associated root cause error at a lower stack level; creating an error trace entry for the error; associating an error log identifier with the error trace entry; making the combined error log identifier and the error trace entry into an error identifier that is unique within the plurality of host systems in said stacked system; and communicating the error identifier to any requester of a service at a user application interface of one or more host systems when the service must be failed because of the root cause error.Type: GrantFiled: October 20, 2003Date of Patent: April 24, 2007Assignee: International Business Machines CorporationInventors: Peter John Deacon, Carlos Francisco Fuente, William James Scales, Barry Douglas Whyte
-
Patent number: 7206966Abstract: One embodiment disclosed relates to a method of executing program code on a target microprocessor with multiple CPU cores thereon. One of the CPU cores is selected for testing, and inter-core context switching is performed. Parallel execution occurs of diagnostic code on the selected CPU core and the program code on remaining CPU cores. Another embodiment disclosed relates to a microprocessor having a plurality of CPU cores integrated on the microprocessor chip. Inter-core communications circuitry is coupled to each of the CPU cores and configured to perform context switching between the CPU cores.Type: GrantFiled: October 22, 2003Date of Patent: April 17, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew Harvey Barr, Ken Gary Pomaranski, Dale John Shidla
-
Patent number: 7206969Abstract: One embodiment disclosed relates to a method of compiling a program to be executed on a target microprocessor. A cycle is identified during which a functional unit would otherwise be idle. A diagnostic operation is opportunistically scheduled for execution on the functional unit during that cycle, and a comparison is scheduled to compare a result from executing the diagnostic operation with a corresponding predetermined result.Type: GrantFiled: September 10, 2003Date of Patent: April 17, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Dale John Shidla, Andrew Harvey Barr, Ken Gary Pomaranski
-
Patent number: 7200777Abstract: Techniques are described that utilize multiple audit files for a common audit trail for data logging and recovery within a computing system. For example, an audit control module maintains a queue of file identifiers for audit files associated with the audit trail. The audit control module selects file identifiers from the queue, and stores audit blocks within the audit files based on the selected file identifiers. In this manner, the audit control module may store non-duplicate portions of the audit trail data within different audit files associated with the audit trail. By making use of multiple audit files for a single audit trail, the transfer of an audit block to the audit trail need not be delayed until the completion of a previous data transfer to the audit trail.Type: GrantFiled: December 27, 2002Date of Patent: April 3, 2007Assignee: Unisys CorporationInventor: Dick G. Bouchee
-
Patent number: 7181643Abstract: A comparison method compares the address of a memory cell with a known address of a faulty memory cell in a semiconductor memory module. The module is subdivided into banks and has an address structure in which each address is associated with a bank that is organized in rows and columns and is defined by a row address, a column address and a bank address. Not only the row address is determined, but also the column address and the bank address when a memory access occurs. A bank is activated with a bank selection signal, and the access to a valid address of a faulty memory cell is indicated by an enable register.Type: GrantFiled: October 20, 2003Date of Patent: February 20, 2007Assignee: Infineon Technologies AGInventors: Robert Kaiser, Florian Schamberger
-
Patent number: 7174479Abstract: Disclosed is a rollback-free method for performing multi-step procedures in the presence of possible failure. As the procedure proceeds from its initial state through transitions to its final state, its constituent transitions are monitored for failure. If a failure is detected, then the procedure is “sidetracked” into a recovery coordination state. From the recovery coordination state, the procedure is logically taken back to its initial state and retried. In this manner, the procedure is shepherded, without rollbacks, through its transitions until it successfully reaches its final state. In a particular embodiment, a multi-step procedure is developed for moving a resource from one resource server to another. The steps of the procedure are designed so that all throughout the procedure, both of the resource servers and a directory server are kept synchronized. This allows client requests to proceed without interruption even during the resource movement.Type: GrantFiled: September 10, 2003Date of Patent: February 6, 2007Assignee: Microsoft CorporationInventors: Serkan M. Kutan, Shaun D. Cox
-
Patent number: 7168002Abstract: Methods, systems, and articles of manufacture for preserving error data on a computing platform that lacks non-volatile storage (e.g., a “diskless” platform) are provided. In response to detecting a platform error (e.g., automatically by hardware, software, or manually by a user when a wait or loop condition is suspected), platform error data may be gathered and temporarily stored in volatile storage accessible on the platform. In order to preserve the platform error data in the event power is lost after the error, the platform error data is transferred to a target system with access to non-volatile storage. Once the target system indicates the platform error data has been stored in non-volatile storage, the volatile storage used to temporarily store the platform error data may be freed-up.Type: GrantFiled: April 25, 2003Date of Patent: January 23, 2007Assignee: International Business Machines CorporationInventors: Salim Ahmed Agha, Brent Robert Tiefenthaler
-
Patent number: 7146525Abstract: A method of backing up and recovering data in the hard disk of a computer, comprising a step of backing up data in the hard disk, including: allocating a mirror partition in a hard disk for backing up the data in a partition of the hard disk where the data need to be backed up are stored; backing up integrally the data in the backed up partition specified by the user into the allocated corresponding mirror partition; and hiding the space of the mirror partition; the method further comprising a recovery step for recovering integrally the hard disk data in the mirror partition into the corresponding backed up partition according to the instruction of the user. The present invention can back up and recovery all kinds of data in the hard disk safely and reliably.Type: GrantFiled: August 31, 2001Date of Patent: December 5, 2006Assignee: Legend (Beijing) LimitedInventors: Dong Han, Changqing Wan, Danfeng Zhang
-
Patent number: 7143277Abstract: Methods and apparatus for event based console management in a pre-boot environment are disclosed. For example, an event handler is provided for use in a computer having a processor. The example event handler includes a console maintenance agent in communication with the controller to monitor the computer and a driver monitor in communication with the controller to monitor a first driver. The event handler also includes an error monitor in communication with the controller to monitor the computer for a system error and a driver loader in communication with the controller to load a second driver for a console.Type: GrantFiled: August 19, 2002Date of Patent: November 28, 2006Assignee: Intel CorporationInventors: Mallik Bulusu, Vincent J. Zimmer