Patents Examined by Brian D. Hearn
  • Patent number: 5374584
    Abstract: A method for isolating elements in a silicon semiconductor device is disclosed. The invention discloses the steps of: (1) forming a thermal silicon oxide layer on a silicon substrate, depositing a layer of polysilicon, and depositing a first silicon nitride layer thereon, (2) patterning an active region and a field region, and etching the thermal oxidation layer, the polysilicon layer and the first silicon nitride layer on the field region to forth an active region pattern, (3) depositing a second silicon nitride layer, and, thereupon, depositing a silicon oxide layer, (4) etching back the oxide layer by application of a reactive ion etch technique, forming a silicon oxide side wall on the side of the active region pattern, and etching back the second silicon nitride layer using the oxide side wall as a mask to expose the silicon substrate, (5) removing the oxide side wall, and performing a channel stop field ion implantation, and (6) performing a field oxidation process to form a field oxide layer.
    Type: Grant
    Filed: July 12, 1993
    Date of Patent: December 20, 1994
    Assignee: Goldstar Electron Co. Ltd.
    Inventors: Chang-Jae Lee, Hee-Sik Yang