Patents Examined by Brian K. Talbot
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Patent number: 7404980Abstract: The inventive method relates to microelectronic and consists in the application of an emission layer to elements of an addressable field-emission electrode with the aid of a gas-phase synthesis method in a hydrogen flow accompanied by a supply of a carbonaceous gas. A dielectric backing is made of a high-temperature resistant material and discrete elements of the addressable field-emission electrode are made of a high-temperature resistant metal. The growth rate of the emission layer on the dielectric backing is smaller than the growth rate of the emission layer on the metallic discrete elements as a result of a selected process of depositing the carbonaceous emission layer, namely the backing temperature, the temperature of the reactor threads, the pumping speed of a gas mixture through the reactor, a selected distance between the reactor threads and the backing and a settling time. The cathode metallic discrete elements can be made of two metallic layers.Type: GrantFiled: February 22, 2001Date of Patent: July 29, 2008Inventors: Alexandr Alexandrovich Blyablin, Alexandr Tursunovich Rakhimov, Vladimir Anatolievich Samorodov, Nikolaii Vladislavovich Suetin
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Patent number: 7396566Abstract: A method for fabricating an organic conductor path on a substrate includes providing a printing stamp with a hydrophobic patterned printing side that is loaded with a printing medium containing an organic conductive polymer and, by bringing it into contact with a hydrophilic substrate, a patterned layer including the organic polymer are formed on the substrate. The method can be operated continuously through selection of suitable geometries for the printing stamp and the substrate.Type: GrantFiled: February 28, 2005Date of Patent: July 8, 2008Assignee: Infineon Technologies, AGInventors: Ute Zschieschang, Marcus Halik, Hagen Klauk, Guenter Schmid
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Patent number: 7390527Abstract: A method is for manufacturing a nanostructure in-situ, at least one predetermined point on a supporting carrier. The method includes choosing a suitable material for a substrate in the carrier, creating the substrate, and preparing a template on the substrate so that the template covers the predetermined point. The template is given a proper shape according to the desired final shape of the nanostructure, and a film of nanosource material with desired dimensions is formed on the template. The film of nanosource material is made to restructure from a part of the template, thus forming the desired nanostructure. Suitably, the template includes a first and a second area which have different properties with respect to the nanosource material.Type: GrantFiled: December 30, 2002Date of Patent: June 24, 2008Assignee: Chalmers Intellectual Property Rights ABInventors: Per Hyldgaard, Dinko Chakarov, Bengt Lundqvist
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Patent number: 7387811Abstract: A CVD apparatus capable of substantially simultaneously processing multiple portions of at least one substrate or substantially simultaneously processing portions of multiple substrates or substantially simultaneously processing multiple portions of at least one substrate and portions of multiple substrates, the CVD apparatus is described. The CVD apparatus includes a reactor, at least one substrate heater, at least one precursor supply system, at least one precursor injector, optionally, communicating with at least one temperature regulated manifold, at least one reactants mixer, and, optionally, at least one controller communicating with at least one substrate heater, the at least one precursor supply system, the at least one precursor injector, the at least one temperature regulated manifold, and combinations thereof.Type: GrantFiled: September 21, 2004Date of Patent: June 17, 2008Assignee: Superpower, Inc.Inventor: Venkat Selvamanickam
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Patent number: 7384663Abstract: Carbon nanotubes are incorporated in the fiber structure by growing them on the refractory fibers of the substrate so as to obtain a three-dimensional substrate made of refractory fibers and enriched in carbon nanotubes. The substrate is densified with a matrix to form a part of composite material such as a friction part of C/C composite material.Type: GrantFiled: March 10, 2005Date of Patent: June 10, 2008Assignee: Snecma Propulsion SolideInventors: Pierre Olry, Yannick Claude Breton, Sylvie Bonnamy, Nathalie Nicolaus, Christian Robin-Brosse, Eric Sion
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Patent number: 7361377Abstract: This invention provides a method of making a fluorinated precursor of a superconducting ceramic. The method comprises providing a solution comprising a rare earth salt, an alkaline earth metal salt and a copper salt; spraying the solution onto a substrate to provide a film-covered substrate; and heating the film-covered substrate in an atmosphere containing fluorinated gas to provide the fluorinated precursor.Type: GrantFiled: July 18, 2003Date of Patent: April 22, 2008Assignee: Brookhaven Science Associates, LLCInventors: Harold Wiesmann, Vyacheslav Solovyov
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Patent number: 7311937Abstract: The invention provides a method for forming a uniform conductive-film interconnecting pattern via simplified processes. In particular, the invention provides: a method for forming an interconnecting pattern having at least one corner and which does not cause irregularities at the corner, an interconnecting pattern formed according to the method, and an electronic apparatus and a non-contact type card medium including the interconnecting pattern. The method includes forming a line pattern having at least one corner defined by at least two lines by applying a liquid containing a pattern material to a substrate. The liquid is applied by ink jet printing such that the corner has at least one additional protrusion other than the two lines, and is then fired to transform into a conductive-film interconnecting pattern.Type: GrantFiled: October 30, 2002Date of Patent: December 25, 2007Assignee: Seiko Epson CorporationInventor: Takashi Hashimoto
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Patent number: 7309511Abstract: The present invention provides an oxide superconductor thick film which is formed on a substrate or a board and has a high Jc and Ic and a method for manufacturing the same. Predetermined amounts of materials containing elements of Bi, Pb, Sr, Ca and Cu are weighed, mixed and subjected to steps of calcining, milling, and drying, and thereafter an organic binder and an organic vehicle are added thereto to prepare a (Bi, Pb)2+aSr2Ca2Cu3O2 superconductive paste, which is applied to the surface of a substrate or a board in a thickness of 260 ?m or more and dried. Thereafter, the paste is first subjected to burning at temperatures of 835° C. to 840° C. for 100 hours, then pressurization, and further burning at temperatures of 835° C. to 840° C. for 100 hours, thereby preparing an oxide superconductor thick film having a film thickness of 130 ?m or more having a high Jc and Ic.Type: GrantFiled: May 20, 2005Date of Patent: December 18, 2007Assignees: Dowa Electronics Materials Co., Ltd, Central Research Institute of Electric Power IndustryInventors: Masahiro Kojima, Masakazu Kawahara, Michiharu Ichikawa, Hiroyuki Kado, Masatoyo Shibuya
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Patent number: 7300683Abstract: The invention provides a method of forming a resistance film with even thickness and at high speed even in a substrate having micro depressions and projections in its surface. A fine particle dispersion solution is prepared by adding a solution which decreases the absolute value of a ? potential at the fine particles and a solution which decreases dispersion stability of the fine particles into a solution in which metal oxide fine particles are stably dispersed, a substrate having an insulating surface is immersed in the fine particle dispersion solution to deposit a fine particle aggregation film, and then a resistance film is obtained by performing heat treatment.Type: GrantFiled: December 20, 2004Date of Patent: November 27, 2007Assignee: Canon Kabushiki KaishaInventor: Yoshio Suzuki
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Patent number: 7294358Abstract: An anisotropic conductive film includes a release layer, an insulating adhesive matrix on the release layer, and conductive particles distributed in the matrix in a substantially uniform pattern. The film may also include a patterned adhesive layer on the release layer, so that the particles are positioned in a pattern that substantially corresponds to the pattern of the patterned adhesive layer.Type: GrantFiled: June 21, 2005Date of Patent: November 13, 2007Assignee: Xerox CorporationInventor: Man C Tam
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Patent number: 7285305Abstract: A method of producing a multilayered wiring board having at least two wiring layers (wiring patterns 17, 31), polyamide 22 (an interlayer insulation film) between the wiring layers, and an interlayer conducting post (a conductor post) 18 for conducting between the wiring pattern 17 and the wiring pattern 31, wherein the polyimide 22 is disposed around the interlayer conducting post 18 using a liquid drop discharge system.Type: GrantFiled: April 16, 2003Date of Patent: October 23, 2007Assignee: Seiko Epson CorporationInventors: Masahiro Furusawa, Hirofumi Kurosawa, Takashi Hashimoto, Masaya Ishida
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Patent number: 7276267Abstract: A method making possible the production of an injection molded conductor carrying means composed of a first supporting substrate and a second supporting substrate. The first supporting substrate comprises a basically metallizeable plastic material and the second supporting substrate a basically non-metallizeable plastic material. However the plastic material of the second supporting substrate is able to be activated by a laser beam. The laser activation produces a metallization pattern on it and such pattern is connected with uncovered areas of the first supporting substrate, following which a common treatment takes place which results in an electrical conductor arrangement being produced. The invention furthermore relates to a conductor carrying means produced by the method.Type: GrantFiled: July 11, 2003Date of Patent: October 2, 2007Assignee: Festo AG & Co.Inventor: Stephan Schauz
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Patent number: 7270844Abstract: Methods and apparatus for the deposition of a source material (10) are disclosed. An atomizer (12) renders a supply of source material (10) into many discrete particles. A force applicator (14) propels the particles in continuous, parallel streams of discrete particles. A collimator (16) controls the direction of flight of the particles in the stream prior to their deposition on a substrate (18). In an alternative embodiment of the invention, the viscosity of the particles may be controlled to enable complex depositions of non-conformal or three-dimensional surfaces. The invention also includes a wide variety of substrate treatments which may occur before, during or after deposition. In yet another embodiment of the invention, a virtual or cascade impactor may be employed to remove selected particles from the deposition stream.Type: GrantFiled: September 20, 2004Date of Patent: September 18, 2007Assignee: Optomec Design CompanyInventor: Michael J. Renn
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Patent number: 7264842Abstract: A manufacturing method for a wiring substrate for a display panel having a plurality of wiring electrodes thereon includes the step of forming wirings in an orthogonal projection area of an image forming member onto the wiring substrate by photolithography using a photo paste. In addition, wires are formed in an area where the frame member is disposed by pattern printing using paste ink for printing.Type: GrantFiled: July 9, 2004Date of Patent: September 4, 2007Assignee: Canon Kabushiki KaishaInventors: Yasuyuki Watanabe, Kazuya Ishiwata, Shinsaku Kubo
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Patent number: 7247341Abstract: The present invention provides a method for forming an electrode of a flat panel display device using ink for ink jet printing and an ink jet printer. The ink for ink jet printing is prepared by a method comprising the first step of contacting the vapor of a metal with the vapor of the first solvent, according to the vapor phase-evaporation technique, to thus give a dispersion of metal ultrafine particles; the second step of adding a low molecular weight polar solvent as the second solvent to the dispersion prepared in the first step to thus precipitate the metal ultrafine particles and removing the first solvent; and the third step of adding the third solvent to the precipitates thus prepared to carry out the solvent substitution and to give a dispersion of independently dispersed metal ultrafine particles, and prepared by adding a dispersant in or during the foregoing first and/or third steps, and the ink for ink jet printing consists of a dispersion excellent in ink characteristic properties.Type: GrantFiled: December 4, 2001Date of Patent: July 24, 2007Assignee: Ulvac, Inc.Inventors: Noriyuki Abe, Masaaki Oda
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Patent number: 7247340Abstract: A method of forming a superconducting conductor is disclosed. The method provides translating a substrate tape through a deposition chamber and along a helical path, where the helical path has multiple windings of the substrate tape and each winding of the substrate tape extends along a feed path and a return path. The method further provides depositing a HTS layer overlying the substrate tape within a deposition chamber, wherein the deposition chamber houses the substrate tape along the feed path but not the return path.Type: GrantFiled: December 28, 2005Date of Patent: July 24, 2007Assignee: Superpower, Inc.Inventors: Thomas Martin Salagaj, Venkat Selvamanickam
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Patent number: 7226640Abstract: A method of forming an iridium-containing film on a substrate, from an iridium-containing precursor thereof which is decomposable to deposit iridium on the substrate, by decomposing the precursor and depositing iridium on the substrate in an oxidizing ambient environment which may for example contain an oxidizing gas such as oxygen, ozone, air, and nitrogen oxide. Useful precursors include Lewis base stabilized Ir(I)?-diketonates and Lewis base stabilized Ir(I) ?-ketoiminates. The iridium deposited on the substrate may then be etched for patterning an electrode, followed by depositing on the electrode a dielectric or ferroelectric material, for fabrication of thin film capacitor semiconductor devices such as DRAMs, FRAMs, hybrid systems, smart cards and communication systems.Type: GrantFiled: December 6, 2001Date of Patent: June 5, 2007Assignee: Advanced Technology Materials, Inc.Inventors: Thomas H. Baum, Chongying Xu
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Patent number: 7226635Abstract: A method for coating a sealant (39) on a separator (40) for a fuel cell. The separator has a sealing groove (118) formed therein, and widths of the sealing groove at a coating-start portion (39a) and a coating-end portion (39b) of the sealant are made greater than widths of remaining portions of the sealing groove. The sealant coating-start portion and the coating-end portion are made to intersect at a place where the width of the sealing groove is large. Adhesion between the coating-start portion and the coating-end portion is improved, and also, degrees of freedom of a sealant coated position increase, and sealability of a cell for a fuel cell is improved.Type: GrantFiled: July 2, 2002Date of Patent: June 5, 2007Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Akiyoshi Machida, Tetsuo Ishii, Eiichiro Uematsu, Akihiro Ohsugi, Osamu Kakutani, Youichi Kamiyama
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Patent number: 7226634Abstract: The plating method comprises the steps of dividing a region, to be plated, into a group of mesh-like zones, measuring a plating area of each of the zones, comparing the measurement values of the plating areas and judging whether or not the plating area has any variance, and conducting a design change, on patterns contained in this zone, to eliminate the variance.Type: GrantFiled: October 2, 2002Date of Patent: June 5, 2007Assignee: Fujitsu LimitedInventor: Motoharu Nii
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Patent number: 7208191Abstract: A structure comprises a thermal energy generating component and a thermal dissipating device in thermal conductive contact with the component, the device comprising a substrate with a fullerene coating. A method of producing a computer comprises applying a layer of fullerene onto a substrate and disposing the substrate in a heat dissipation relationship to a microprocessor.Type: GrantFiled: April 23, 2002Date of Patent: April 24, 2007Inventor: Philip D. Freedman