Patents Examined by Brigitte A Patterson
  • Patent number: 10656510
    Abstract: The invention relates to a SLED device emitting light from a substrate side, configured to suppress lasing, and comprising a reflective element (55) on a front surface of a substrate (22) configured to redirect an optical beam (light) onto a back surface of the substrate (22). In one embodiment the device can be used for making a compact RGB (red-green-blue) projector.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: May 19, 2020
    Assignee: UNIVERSITY COLLEGE CORK, NUI, CORK
    Inventors: Pleun Maaskant, Brian Corbett
  • Patent number: 10309940
    Abstract: There are provided a data processing device for chromatograph and a data processing method for chromatograph which allow a peak to be desirably checked. A peak (correction target peak (P1)) whose intensity exceeds a predetermined threshold in a chromatogram at a target wavelength (?1) is corrected based on correction reference values (height (H1) and area (A1) of a peak (P11)) and a sensitivity coefficient (R=I1/I2), and the chromatogram after correction is displayed or printed. Therefore, even if the correction target peak (P1) is saturated, display or printing may be performed in a state where correction has been performed so that the chromatogram at the peak (P1) is not cut off in the middle. Accordingly, at the time of display or printing of the chromatogram, a fine peak may be prevented from becoming too small, and also the correction target peak (P1) may be prevented from being cut off in the middle, and thus the peaks may be desirably checked.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: June 4, 2019
    Assignee: SHIMADZU CORPORATION
    Inventors: Etsuho Kamata, Toshinobu Yanagisawa, Yasuhiro Mito, Kenichi Mishima
  • Patent number: 9431366
    Abstract: A method of forming a 3D package. The method may include joining an interposer to a laminate chip carrier with the solid state diffusion of a first plurality of solder bumps by applying a first selective non-uniform heat and first uniform pressure; joining a top chip to the interposer with the solid state diffusion of a second plurality of solder bumps by applying a second selective non-uniform heat and second uniform pressure; heating the 3D package, the first and second pluralities of solder bumps to a temperature greater than the reflow temperature of the first and second pluralities of solder bumps, where the second plurality of solder bumps achieves the reflow temperature before the first plurality of solder bumps, where the first and second selective non-uniform heats being less that the reflow temperature of the first and second pluralities of solder bumps, respectively.
    Type: Grant
    Filed: May 6, 2015
    Date of Patent: August 30, 2016
    Assignee: International Business Machines Corporation
    Inventors: Mario J. Interrante, Katsuyuki Sakuma
  • Patent number: 9378985
    Abstract: A first area of a first surface of an encapsulated component can be thinned, the component including: a semiconductor chip having an active surface opposite the first surface, and an encapsulant extending outwardly from edges of the semiconductor chip. An entire area of the active surface may be aligned with the first area. After the abrading, a second area of the encapsulated component beyond the first area may have a thickness greater than a thickness of the first area. The second area can be configured to fully support the abraded encapsulated component in a state of the encapsulated component being manipulated by handling equipment.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: June 28, 2016
    Assignee: Invensas Corporation
    Inventors: Belgacem Haba, Ilyas Mohammed
  • Patent number: 8697546
    Abstract: A method of manufacturing a semiconductor device, comprising bonding a first principal surface of a substrate to a supporting substrate through a light-to-heat conversion film, and removing a portion of the light-to-heat conversion film exposed on the supporting substrate. A method of manufacturing a semiconductor device, comprising forming a light-to-heat conversion film on a supporting substrate, bonding a semiconductor substrate to the supporting substrate, so that the light-to-heat conversion film extends outside the semiconductor substrate, performing an anti-contamination treatment on the light-to-heat conversion film, and separating the supporting substrate and the semiconductor substrate from each other.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: April 15, 2014
    Inventor: Kenta Ono