Abstract: A method for manufacturing a semiconductor device includes the steps of consecutively depositing a Poly-Si layer, a WN layer and a W layer on a SiO2 layer, forming a mask pattern on the W layer, selectively etching the W layer by using plasma in a first etching gas having a high etch selectivity ratio between W and WN, selectively etching the WN layer and the Poly-Si layer by using plasma in a second etching gas having a high etch selectivity between WN and Si, and selectively etching the Poly-Si layer 13 by using plasma in a third etching gas having a high etch selectivity between Si and silicon oxide.
Abstract: A fabrication method for a semiconductor device is provided. A substrate has an array area with a first gate and a peripheral area with a second gate. First and second isolation layers made of different materials are sequentially formed to cover the first gate, the second gate and the substrate. A portion of the second isolation layer is removed to form spacers on sidewalls of the first and second gates and expose the first isolation layer on a top of the first gate, a top of the second gate, and a surface of the substrate. The spacers on the first isolation layer in the array area are removed. The first isolation layer on the top of the first gate and the surface of the substrate is removed, thereby leaving a portion of the first isolation layer covering on the sidewalls of the first gate.
Type:
Grant
Filed:
September 2, 2005
Date of Patent:
April 8, 2008
Assignee:
ProMOS Technologies Inc.
Inventors:
Chao-Hsi Chung, Chu-Chun Hu, Chih-Cheng Wang