Patents Examined by Bussell W. Blum
  • Looped bus system for connecting plural nodes or plural circuit cards
    Patent number: 5487062
    Abstract: A looped bus system includes several nodes connected by unidirectional buses having opposite directions of signal transmission. The head of bus function for each bus is located at a node different from the head of bus function for the other bus. The head of bus function for each bus is located at the same node as the termination of bus function for the other bus; As a result, the buses can be reconfigured and nodes can be added freely by the use of a bus portion that is unused in the looped bus under normal condition.
    Type: Grant
    Filed: April 19, 1994
    Date of Patent: January 23, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Junichirou Yanagi, Akihiko Takase, Setsuo Takahashi