Abstract: The present invention relates to a method for authenticating a device with a wireless access point. The method includes receiving an audio signal at the device via a microphone; processing the audio signal to extract a code; using the code to authenticate the device, at least to part, with the wireless access point; and in response to the authentication, providing access to one or more network services to the device via the wireless access point A system and software are also disclosed.

Abstract: The embodiments disclosed herein relate to various robotic and/or in vivo medical devices having compact joint configurations. Other embodiments relate to various medical device components, including forearms having grasper or cautery end effectors, that can be incorporated into certain robotic and/or in vivo medical devices.

Abstract: The present invention provides a method of treating or alleviating erectile dysfunction in a patient. Multiple electrodes are placed within a segment of the internal iliac artery of the patient and against blood vessel wall of the internal iliac artery. Radiofrequency energy is released through at least one of the multiple electrodes to nearby tissues, so as to increase the temperature of the nearby tissues and induce a thermal alteration of the nearby tissues.

Abstract: An electrosurgical generator includes: a power supply configured to output a DC waveform; a power converter coupled to the power supply and configured to generate a radio frequency waveform based on the DC waveform; an active terminal coupled to the power converter and configured to couple to a first electrosurgical instrument and a second electrosurgical instrument; at least one sensor coupled to the power converter and configured to sense at least one property of the radio frequency waveform; and a controller coupled to the power converter. The controller is configured to: determine a first impedance associated with a first electrosurgical instrument and a second impedance associated with a second electrosurgical instrument based on the at least one property of the radio frequency waveform; and adjust at least one parameter of the radio frequency waveform based on the first impedance and the second impedance.

Abstract: Herein disclosed is a method of detecting and identifying the source of abnormal electrical currents in the heart to assist in ablating these currents, comprising the use of contact or non-contact temperature measurement devices. In an embodiment, source of abnormal electrical activity of the heart and its attached arteries and veins show different temperature patterns from normal segments. In an embodiment, the method further comprises analyzing the temperature of the chamber of interest, and determining regions of low or high temperature by extension metabolic activity. In an embodiment, the method comprises measuring myocardial temperature comprising placing an array of thermocouples imbedded on a basket in the cardiac chamber. In an embodiment, the thermocouples are placed in contact with the myocardial tissue.

Abstract: A three-dimensional modeling system includes a multi-axis range sensor configured to capture a first set of three-dimensional data representing characteristics of objects in an environment; a data sensor configured to capture a first set of sensor data representing distances between at least a subset of the objects and the data sensor; a computer-readable memory configured to store each of the first set of three-dimensional data and the first set of sensor data; a mobile base; a processor; and a computer-readable medium containing programming instructions configured to, when executed, instruct the processor to process the first set of three-dimensional data and the first set of sensor data to generate a three-dimensional model of the environment.

Abstract: A low profile roller includes a wheel mounted on a hollow hub and having a roller ball mounted within the hollow hub. The roller is configured to function in a first, low profile operating mode when the roller ball is in contact with a support surface and in a second, high profile mode when the wheel is in contact with the support surface. A base for a movable support platform includes a base frame and a pivot sleeve rotatably mounted to the base frame and non-rotatably mounted to an arm connected to the hub. The pivot sleeve is configured to rotate the low profile roller from between the first mode and the second mode. A butterfly foot pedal is operably connected to the pivot sleeve.

Abstract: A baby stroller for transporting an infant at speeds faster than normal walking is disclosed. This baby stroller can be folded to make it easier to stow and transport. The folding mechanism, a unique feature of the design is directed toward compactness, ease of use, reliability, and reduction in manufacturing costs.

Abstract: A support frame having a plurality of wheeled assemblies, mounted at corners of the support frame, each wheeled assembly including a substantially identical mechanism for extending and retracting a respective wheel assembly. Each mechanism has a locking member which includes a locking portion for selectively engaging locking apertures on a rotatable member which rotatably supports the wheel assembly. Each mechanism also includes a grip, spaced from the locking member, to facilitate rotation of the rotatable member and the respective wheel assembly between extended and retracted positions when the locking portion is disengaged from the locking apertures. When each wheel assembly is in an extended position, the support frame is able to roll on a suitable surface. Each wheel assembly is also capable of being retained in a retracted position housed within a recess in its associated housing.

Abstract: A method, system and computer program product for detecting when insufficient RAM is available in a computer system, and estimating the additional RAM needed to avoid excess paging. The invention uses memory management parameters to estimate the number of frequently-used pages stored in “virtual memory” on disk. If this estimate is nonzero for an appreciable period the amount of RAM is insufficient, and RAM equal to the estimate should be added to the system.

Abstract: A high-speed memory system is disclosed in which a single command effects control over either a single memory device or a plurality of memory devices depending on a present mode of operation. Such control may effect data transfer between the one or more memory devices and a memory controller, as well as operating state transitions or power mode transitions for the memory devices. Similarly, various configurations of relatively low bandwidth memory devices respond as a selectively controllable group to transmit or receive high bandwidth data.

Abstract: A cache coherency protocol uses a “Tagged” coherency state to track responsibility for writing a modified value back to system memory, allowing intervention of the value without immediately writing it back to system memory, thus increasing memory bandwidth. The Tagged state can migrate across the caches (horizontally) when assigned to a cache line that has most recently loaded the modified value. Historical states relating to the Tagged state may further be used. The invention may also be applied to a multi-processor computer system having clustered processing units, such that the Tagged state can be applied to one of the cache lines in each group of caches that support separate processing unit clusters. Priorities are assigned to different cache states, including the Tagged state, for responding to a request to access a corresponding memory block. Any tagged intervention response can be forwarded only to selected caches that could be affected by the intervention response, using cross-bars.

Abstract: A microcomputer comprises a CPU, a built-in memory and a memory controller. The memory controller performs access control to the built-in memory in response to a memory access request from the CPU. The microcomputer further comprises a wait count register for storing a waiting period relating to memory access. The memory controller reads the waiting period upon receipt of the memory access request, and then, performs the access control to the built-in memory after a lapse of the waiting period. Low power consumption is achieved by utilizing the access control to the built-in memory without controlling a power source and an oscillator.

Abstract: A computer system for CPU command conversion or real-time compilation with excellent performance. A part of a memory is operated as a special memory area for CPU command conversion or for real-time compilation. The computer system includes: a CPU; a memory; a memory controller for controlling the memory; a chip set; a ROM; a special memory setting table for setting a memory capacity to be mounted, and a capacity setting value of the special memory area corresponding to the capacity setting value of the special memory area corresponding to the capacity of each memory capacity; and a special memory area setting unit for reading the capacity setting value of the special memory area corresponding to the capacity of all the mounted memories from the special memory setting table at the time of starting, and then setting the special memory area.

Abstract: A circuit comprising a memory and a logic circuit. The memory may be configured to read and write data in a plurality of memory queues to/from a write data path and a read data path in response to (i) a first and a second select signal and (ii) a first control signal. The logic circuit may be configured to generate (i) the first and second select signals and (ii) the control signal in response to one or more signals received from a read management path and/or a write management path.

Abstract: An invalid-to-dirty request permits a transition from an invalid memory state to a dirty state without requiring an up-to-date copy of the memory. The present invention is a system for supporting invalid-to-dirty memory transactions in an aggressive cache coherence protocol that minimizes directory entry locking. The nodes of a multiprocessor system each include a protocol engine that is configured to implement a distinct invalidation request that corresponds to an invalid-to-dirty memory transaction. If node O receives this distinct invalidation request while waiting for a response to an outstanding request for exclusive ownership, the protocol engine of node O is configured to treat the distinct invalidation request as applying to the memory line of information that is the subject of the outstanding request for exclusive ownership.

Abstract: A load estimator supplies, to a controller, a load condition signal corresponding to the current load condition and the estimated load condition of the system. An operational setting storage unit stores an operational setting requirement of the entire system. When the controller determines that the operational requirement meets the operational setting requirement, and the load condition signal meets a predetermined requirement, it reads out, from a relocation program storage unit, an optimum relocation program in association with location information stored in a data location information storage unit, and controls a data relocation unit in accordance with the read relocation program. During a process for relocating data, the controller monitors a predetermined requirement of the suspension (execution of writing, etc., data to a data storage unit). When the requirement of the suspension is fulfilled, the controller terminates the data relocation process processed by the data relocation unit.

Abstract: In a chip multiprocessor system, the coherence protocol is split into two cooperating protocols implemented by different hardware modules. One protocol is responsible for cache coherence management within the chip, and is implemented by a second-level cache controller. The other protocol is responsible for cache coherence management across chip multiprocessor nodes, and is implemented by separate cache coherence protocol engines. The cache controller and the protocol engine within each node communicate and synchronize memory transactions involving multiple nodes to maintain cache coherence within and across the nodes. The present invention addresses race conditions that arise during this communication and synchronization.

Abstract: A method for enhanced fragment caching. The method can include identifying in at least one of first and second retrieved page fragments a variable object utilized by the fragment upon execution to produce dynamic content. Separate cache entries can be written for the first and second retrieved page fragments where the first and second retrieved page fragments differ in ways other than an evaluation of the variable object. Otherwise, a single cache entry can be written for both the first and second retrieved page fragments where the first and second retrieved page fragments differ only in the evaluation of the variable object.

Abstract: A data management system for storing data in a multiple-level cache arrangement of a database comprises a multi-tier cache memory for initially storing all data in summary form in a secondary cache which may be the database; a processor for receiving requests for data and for moving requested data from the secondary cache to a primary cache, wherein, when subsequent requests for data are received, the primary cache is searched before the secondary cache; and for periodically synchronizing and merging all data in the primary cache back into said secondary cache to refresh said primary cache and remove stale information. The system is particularly useful for managing a telecommunications system call detail summary database in which telephone call details are collected as AMA records after the calls terminate and the AMA records are forwarded to a call detail database for storage in summary form and analysis by an external system, for example, for fraud analysis or billing purposes.