Abstract: A dual speed Read-Out Integrated Circuit employs a native pixel array with associated high resolution integration circuits for each pixel and a superpixel array created within the native pixel array by combination of native pixels for charge sharing integration in reduced resolution integration circuits simultaneously with the integration of the high resolution integration circuits. Switching control for readout of the high resolution integration circuits is accomplished at a first frame rate and switching control for readout of the reduced resolution integration circuits is accomplished at a second higher frame rate.
Abstract: A sensor circuit integrated with a signal processing circuit and a charging circuit. The sensor circuit has a sensor voltage source to which a sensor internal resonance is connected in series, the signal processing circuit having a capacitor to which the sensor voltage source is connected via a signal line of the charging circuit, and a switch. The charging circuit includes another capacitor connected to the signal line, and a drive circuit at an input side of which the other capacitor is connected and which has a transconductance equivalent to an internal resistance.
Type:
Grant
Filed:
April 16, 2010
Date of Patent:
December 3, 2013
Assignee:
National University Corporation Shizuoka University
Abstract: A photoelectric encoder includes a scale in which diffraction gratings are formed at predetermined pitches in a measurement axis direction, a detection head which is relatively movable with respect to the scale, and which includes an illuminating portion configured to illuminate the scale, and a light receiving portion configured to receive light reflected by or transmitted through the diffraction gratings of the scale, a signal processing device configured to process a light reception signal output from the light receiving portion of the detection head, and a signal transmitting unit configured to transmit a signal between the detection head and the signal processing device. The signal processing device includes a display unit configured to display information indicating an attachment posture of the detection head with respect to the scale.
Abstract: There are provided a photodiode 11, an inverting amplifier 12 which includes an operational amplifier 12a and a first resistor 12b, a second resistor 21 which has a smaller resistance value than the first resistor 12b and which is inserted between the positive side of a power supply and the photodiode 11, a differential amplifier 22 which outputs a voltage across both ends of the second resistor 21, and a diode 23 which is connected between a ground and a connection point between the photodiode 11 and an inverting input terminal of the operational amplifier 12a and which changes to a non-conductive state when the inverting amplifier 12 is not saturated and changes to a conductive state when the inverting amplifier 12 is saturated so that the output current of the photodiode 11 is bypassed.