Patents Examined by Cathy Lee
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Patent number: 5556673Abstract: These transparent members, capable of withstanding mechanical stresses, comprise at least one glass member (A1) of stem, reed, tube, strip or sheet type and/or glass members (A2) of bead, particle or fragment type, transparent fibers (B) and a cured transparent resin (C) in which the fibers (B) and the members (A2) are embedded; the fibers (B) and the resin (C) with which they are coated being bonded to the members (A1), the resin (C) being chosen so as to exhibit, in the cured state, a refractive index which does not differ, at a wavelength of 510-520 nm, by more than 0.001 from that of the fibers (B) and from that of the members (A1) and (A2), it being nevertheless possible for the difference in index between the resin (C) and the members (A1) of strip or sheet type to range up to 0.01 when these members are large in dimension in relation to the overall structural member.Type: GrantFiled: January 7, 1994Date of Patent: September 17, 1996Assignee: Compagnie Generale D'Innovation et de Developpement COGIDEVInventor: Andre Giraud
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Patent number: 5552209Abstract: The present invention provides a method of improving the vibrational damping characteristics of a circuit article. The method involves adding damping layer(s) to the laminate material that is processed into a circuit article. The damping material effectively increases the damping of the circuit article and reduces the amplitude of resonant frequencies of the circuit article excited by environmental vibrations or shocks that the circuit board may encounter in use and thereby potentially improving the performance of the circuit article for vibration and shock related performance issues without the addition of add-on dampers to the circuit articles surface or by isolating the circuit board by means of vibration and shock isolators.Type: GrantFiled: July 29, 1994Date of Patent: September 3, 1996Assignee: Minnesota Mining and Manufacturing CompanyInventor: Jeffrey W. McCutcheon
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Patent number: 5549959Abstract: A package comprising a central tube, a product wound around the central tube and a perforated film having tube holes prepunched into the film is disclosed. This perforated prepunched tube hole film allows for substantially all of the product exposed surface to be covered by the perforated film but leaves the central tube ends uncovered.Type: GrantFiled: June 20, 1994Date of Patent: August 27, 1996Assignee: W. R. Grace & Co.-Conn.Inventor: Stephen F. Compton
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Patent number: 5543208Abstract: A resistive layer with the elements nickel, chromium, aluminum, cooper and silicon has a low temperature coefficient and a high degree of long-time stability. The copper content is to 5.5 weight-% and the silicon content is 0.5 to 1.6 weight-%, respectively in relation to aluminum, and the ratio of Ni: Cr: AlSiCu is within a range which is defined by a hexagon ABCDEF shown in FIG. 1, the corner points of which are provided by the following compositions in weight-%:______________________________________ A 58 Ni 40 Cr 2 AlSiCu B 52 Ni 33 Cr 15 AlSiCu C 32 Ni 33 Cr 35 AlSiCu D 13 Ni 52 Cr 35 AlSiCu E 13 Ni 75 Cr 12 AlSiCu F 18 Ni 80 Cr 2 AlSiCu.Type: GrantFiled: January 12, 1995Date of Patent: August 6, 1996Assignee: RMT Reinhardt Microtech AGInventor: Peter Hasler
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Patent number: 5453328Abstract: An electromagnetic wave reflection-preventing material having a structure formed by a process which comprises successively laminating (A) a pattern layer formed in the form of a geometrical pattern having a volume resistivity of 10.sup.3 .OMEGA. .Type: GrantFiled: January 21, 1994Date of Patent: September 26, 1995Assignee: Kansai Paint Co., Ltd.Inventors: Toshiaki Nagano, Hideo Kogure, Naozumi Iwasawa, Tetsu Maki
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Patent number: 5344695Abstract: A tri-plate type dielectric filter having a dielectric substrate, a plurality of resonator electrodes embedded in the substrate, and coupling electrodes formed within the dielectric substrate for capacitively connecting the resonator electrodes to provide capacitors between adjacent resonator electrodes. The resonator electrodes may take the form of parallel elongate strips each providing a stripline type .lambda./4 or .lambda./2 TEM mode resonance circuit. One end of each strip is exposed at an outer surface of the substrate. This end of each strip is trimmed to adjust the resonance frequency of the resonance circuit.Type: GrantFiled: March 27, 1992Date of Patent: September 6, 1994Assignee: NGK Insulators, Ltd.Inventors: Takami Hirai, Shinsuke Yano
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Patent number: 5340641Abstract: An electrical overstress responsive composite is formed on an electrically insulative substrate, has a pair of electrodes associated with the substrate and defining a gap between the electrodes and over the interposed portion of the substrate, a pattern of closely spaced electrically conductive elements span said gap and are affixed to said substrate, and a dielectric resin overlies said conductive elements and also spans said gap. The dielectric resin may include conductive and/or semiconductive fine particles. The composite presents a high resistance to a low voltage applied across said electrodes and a low resistance to a high voltage applied across said electrodes.Type: GrantFiled: February 1, 1993Date of Patent: August 23, 1994Inventor: Antai Xu
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Patent number: 5312674Abstract: A ferromagnetic material (18,20) in ink or tape form is sinterable using a same firing profile as and has approximately the same thermal shrinkage characteristics as low-temperature-cofired-ceramic (LTCC) tape, and is chemically non-reactive therewith. The ferromagnetic material (18,20) is applied to the surfaces of LTCC tape sheets (12,14,16) to form desired elements such as cores for inductors (22) and transformers and magnetic shields. Ferromagnetic vertical interconnects (vias) (54) can be formed by punching holes (56) through tape sheets (46) and filling them with ferromagnetic ink. The tape sheets (12,14,16) and ferromagnetic elements (18,20) are laminated together and cofired to form an integral structure (10). Ferromagnetic and non-magnetic components (114) can be fabricated separately and inserted into cavities (104a, 106a,108a) in tape sheets (104,106,108) prior to cofiring.Type: GrantFiled: July 31, 1992Date of Patent: May 17, 1994Assignee: Hughes Aircraft CompanyInventors: Carol Haertling, Andrew A. Shapiro, Charles A. Goodman, Ramona G. Pond, Robert D. Washburn, Robert F. McClanahan, Carlos H. Gonzalez, David M. Lusher
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Patent number: 5308698Abstract: The invention provides a coated electrode for producing a nickel-base weld deposit containing at least 12 weight percent chromium. The coated electrode includes a flux surrounding the core wire. The flux includes in parts by weight 5 to 35 strontium carbonate, 5 to 35 total metal carbonate compound, 0 to 20 manganese with at least 5 manganese present when less than 0.5 weight percent manganese is present in the core wire, 10 to 40 fluoride compound and 5 to 45 oxide compound. A binder is used to hold the flux to the core wire.Type: GrantFiled: May 21, 1992Date of Patent: May 3, 1994Assignee: Inco Alloys International, Inc.Inventors: Robert A. Bishel, Evan B. Hinshaw
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Patent number: 5292574Abstract: A ceramic substrate comprises a ceramic body and a wiring pattern made of silver series selectively formed on the major face of the ceramic body. The ceramic body contains silver particles of 0.1 to 2.5 percents.Type: GrantFiled: August 5, 1991Date of Patent: March 8, 1994Assignee: NEC CorporationInventors: Keiichiro Kata, Yuzo Shimada
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Patent number: 5288535Abstract: An electrode for applying voltage to electroviscous fluid, particularly where the electroviscous fluid has electrically insulating fluid and porous solid particles, the ER effect can be stably maintained up to a high temperature range and high durability can be obtained by laminating an insulating layer on the surface of the electrode in contact with the electroviscous fluid.Type: GrantFiled: November 25, 1992Date of Patent: February 22, 1994Assignee: Tonen CorporationInventors: Makoto Kanbara, Masahiko Hayafune, Hirotaka Tomizawa, Katsuya Arai
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Patent number: 5283104Abstract: Improved via-filling compositions for producing conductive vias in circuitized ceramic substrates, particularly multilayer substrates, without cracking and/or loss of hermetic sealing. The via-filling compositions comprise pastes containing a mixture of (a) ceramic and/or glass spheres of substantially- uniform diameter between about 0.5 and 6 .mu.m, (b) conductive metal particles or spheres having a maximum dimension or diameter between about 1/3 and 1/4 of the diameter of the ceramic and/or glass spheres, and (c) a binder vehicle. The formed conductive via bodies comprise a uniform conductive skeletal network of sintered metal particles densely packed within a uniform matrix of the co-sintered ceramic and/or glass spheres, which matrix is hermetically fused and integrated with ceramic layers forming the wall of the via in the ceramic circuit substrate.Type: GrantFiled: March 20, 1991Date of Patent: February 1, 1994Assignee: International Business Machines CorporationInventors: Farid Y. Aoude, Emanuel I. Cooper, Peter R. Duncombe, Shaji Farooq, Edward A. Giess, Young-Ho Kim, Sarah H. Knickerbocker, Friedel Muller-Landau, Mark O. Neisser, Jae M. Park, Robert R. Shaw, Robert A. Rita, Thomas M. Shaw, Rao Vallabhaneni, Jon A. Van Hise, George F. Walker, Jungihl Kim, James M. Brownlow, deceased
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Patent number: 5283107Abstract: A modular multilayer interwiring structure comprising a plurality of relatively small parts which are produced separately as `sub-units` (1). Each individual layer of the final structure is formed by joining a respective set of unit parts in one plane. The whole multilayer structure is then built by stacking these layers, preferably so that the units of one layer are not vertically aligned with the units of an adjacent layer. Each unit part includes at least one layer of conductive material (8, 9) on its front and/or rearside. These conductive layers may be individually patterned into diverse interconnection lines (5). Throughconnections (6) extending from the frontside to the backside of the units are provided using a desired set or a standardized array of via holes or openings filled with conductive material. By connecting desired throughconnections to the respective conduction lines, each unit may form an individual part of a more complex multilayer interwiring structure.Type: GrantFiled: May 4, 1992Date of Patent: February 1, 1994Assignee: International Business Machines CorporationInventors: Thomas Bayer, Johann Greschner, Willy Hildenbrand, Bernd Marquart, Roland R. Stohr, Olaf Wolter
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Patent number: 5266377Abstract: A method for applying a label, and a label for in-mold molding which comprises a printed layer formed on a surface of a non-oriented plastic base film over which a membrane layer for bonding to be welded by the heat of molded article at the time of the in-mold molding is overlapped. The label is inserted into a mold for the in-mold molding, the label is held on the proper position in the mold by vacuum suction, or by static electricity, and a moldable article, such as a container, is molded by injecting, filling the plastics into the mold or by expanding a parison which was placed in the mold.Type: GrantFiled: November 6, 1992Date of Patent: November 30, 1993Assignee: Yoshino Kogyosho Co., Ltd.Inventors: Harumi Kinoshita, Masunori Shimada, Akikazu Kosugi, Yasuyuki Shimizu, Yoshio Akiyama, Senichi Okita
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Patent number: 5266380Abstract: A printed circuit (pc) board (105) having at least two layers, wherein proper assembly and alignment of the at least two layers may be visually verified, comprises a first layer (410) having a first printed circuit pattern (305) formed thereon, the first printed circuit pattern (305) including a first identifier (115) formed along at least one edge (405) of the first layer (410). The pc board (105) further comprises a second layer (420) having a second printed circuit pattern (305) formed thereon, the second printed circuit pattern (305) including a second identifier (120) formed along at least one edge (405) of the second layer (420), the second identifier (120) being visibly aligned with the first identifier (115) in a predetermined alignment to indicate that the first layer (410) and the second layer (420) are correctly laminated.Type: GrantFiled: September 8, 1992Date of Patent: November 30, 1993Assignee: Motorola, Inc.Inventors: Anthony J. Renguso, Long V. Pham, Tuan K. Nguyen, Basil P. Pappademetriou
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Patent number: 5256469Abstract: The present invention relates broadly to any type of multi-layered, co-fired, ceramic-on-metal circuit board, as a new article of manufacture.The present invention is more specifically directed to various compositions of MgO-13 B.sub.2 O.sub.3 --SiO.sub.2 system glass-ceramics and compositions of such glass-ceramic and suitable fillers, which are suitable for use in the fabrication of multi-layered, co-fired, ceramic-on-metal circuit boards, in which the co-fired, multi-layered ceramic exhibits desirable electrical properties and a temperature coefficient of expansion which closely matches that of its co-fired metal base, although these compositions may have other uses.Type: GrantFiled: December 18, 1991Date of Patent: October 26, 1993Assignee: General Electric CompanyInventors: Stayam C. Cherukuri, Lubomyr S. Onyshkevych, Ashok N. Prabhu, Barry J. Thaler
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Patent number: 5252382Abstract: Interconnect structures for integrated circuits and semiconductor chips are disclosed which employ patterned interfaces to minimize stress migration in the interconnects. The interfaces are patterned to have regions of substantially no adhesion and other regions of good adhesion. The regions of substantially no adhesion reduce stress migration in the interconnect, while the regions of good adhesion ensure adequate thermal contact, fabricability and mechanical integrity of the interconnect structures. The patterned interfaces can be formed either by treating the surfaces of the interconnect or adjacent insulator and passivation layers, or by forming patterned interlayers of material in the interfaces. Multiple layer interconnects can also be formed which incorporate similarly patterned interfaces.Type: GrantFiled: September 3, 1991Date of Patent: October 12, 1993Assignee: Cornell Research Foundation, Inc.Inventor: Che-Yu Li
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Patent number: 5252383Abstract: A carrier sheet for printed circuits and semiconductor chips having enhanced adhesion of conductive metal layers to a fluororesin surface resulting from rendering the fluororesin surface hydrophilic by a hydrophilic macromolecule before plating the metal onto the surface.Type: GrantFiled: June 29, 1992Date of Patent: October 12, 1993Assignee: Japan Gore-Tex, Inc.Inventors: Sunao Fukutake, Kazuhiko Ohashi, Takayuki Wani
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Patent number: 5250341Abstract: In an IC card and a manufacturing method therefor, an adhesive is applied between core layers in the vicinity of an opening in which an IC module is placed. The core sheet layers held between adhesive layers can easily be deformed when heat and pressure are applied. Therefore, a gap formed between the card substrate and the IC module is filled. Furthermore, the gap from the IC module is narrower at the corners of the IC module than conventionally shaped openings. As a result, gaps at the corners of the IC module after integral molding are prevented. Therefore, the gap between the IC module and the card substrate can be reliably filled during molding.Type: GrantFiled: January 30, 1991Date of Patent: October 5, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Makoto Kobayashi, Syojiro Kodai, Katsunori Ochi
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Patent number: 5248530Abstract: A coextruded liquid crystal polymer ("LCP") film or sheet wherein a higher melting LCP layer is laminated to a lower melting LCP layer. These LCP components are coextruded from the same die. This film or sheet may then be laminated onto other materials at a temperature between the melting point of the lower-melting LCP and the higher-melting LCP, so that the latter LCP may maintain its shape, orientation, and mechanical characteristics while the lower-melting LCP component flows and bonds with the other material. When the higher-melting LCP layer is sandwiched between two lower-melting layers, the film or sheet may be laminated on two sides thereof.Type: GrantFiled: November 27, 1991Date of Patent: September 28, 1993Assignee: Hoechst Celanese Corp.Inventors: Randy D. Jester, Detlef K. M. Frank