Abstract: Provided are a method, system, and article of manufacture for updating metadata in a logical volume associated with a storage controller. A data structure is generated indicating data units in a volume whose metadata is to be updated. An operation is initiated to update the metadata for data units indicated in the data structure. Indication is made in the data structure that the metadata for one data unit has been updated in response to updating the metadata for the data unit. An Input/Output (I/O) request is received to one data unit in the volume while the metadata for the data units indicated in the data structure is being updated. A determination is made, in response to the I/O request, from the data structure whether the metadata for the requested data unit was updated. The metadata for the requested data unit is updated in response to determining that the metadata for the requested data unit has not been updated. The I/O request is executed against the requested data unit.

Abstract: Network arrangements wherein a network interface receives write requests of files of a file system from a client computer, each file including respective data and respective metadata. A processor registers the metadata of a file to at least one first type storage medium and writes the data of the file to the at least one second type storage medium based on file value information. The storage system stores information of address ranges of an integrated logical unit, in which each address range corresponds to the at least one first type storage medium and the at least one second type storage medium included in the integrated logical unit, and provides the information of address ranges of the integrated logical unit to the client computer.

Abstract: A storage manager application implemented in a first computational device maintains a virtual logical volume having a plurality of segments created by the storage manager application, wherein space is reserved at the end of a physical volume corresponding to the virtual logical volume, and wherein the physical volume comprises a linear storage medium. A request is received to write data, at the first computational device, from a second computational device. The data is written to the reserved space, wherein the writing of the data causes new segments to be created in the reserved space.

Abstract: In one embodiment, a processor comprises a cache and a cache miss unit coupled to the cache. The cache is coupled to be accessed by cache accesses corresponding to a plurality of threads active in the processor. The cache miss unit is configured to record a plurality of cache misses detected in the cache and to associate each cache miss of the plurality of cache misses with a corresponding thread of the plurality of threads for which that cache miss is detected. Additionally, the cache miss unit is configured to initiate a cache fill for a selected cache miss of the plurality of cache misses. The cache miss unit is configured to select the selected cache miss based on a prioritization of the corresponding threads associated with the plurality of cache misses. In one implementation, the cache is an instruction cache and the cache misses are due to fetches corresponding to the plurality of threads.

Abstract: A data storage control apparatus and method for reduction of traffic of an interconnect occurring in the timing of a cache miss within a CPU. The apparatus and method are realized by utilizing, as a response to the read request from the CPU, data tags DTAGs used for management of data registered to the cache memory within the CPU under the control of a local node and a retention tag used for holding secondary data indicating that the object data is not held in the cache memory of any CPU of a local node.

Abstract: A host computer system is configured to present each of multiple resident contexts with an address space that may be mapped, at least in part, to corresponding portions of a host memory. The address space of a selected context is sampled, and, for each of a plurality of sampled portions of the address space of the selected context that are backed by a corresponding portion of host memory, a count of the number of portions of address spaces of any contexts that are backed by the same portion of the host memory is obtained. A metric is then computed as a function of the count. A decision about swapping out or reclaiming the allocation of the memory of the contexts is based on the metric. The metric is preferably a function of a mean (such as harmonic, geometric or arithmetic) or median of the counts for each context.

Abstract: A caching device is positioned between a memory read/write controller and a flash memory, which contains an instruction register, a logical address register, a data register, a pair of auxiliary controllers, a microprocessor, an address translation unit, a flash memory address register, a caching control unit, and a caching instruction and data buffer area. Among them, the microprocessor is the core of the caching device responsible not only for the reading and writing the flash memory but also for the caching operation for logical and physical address translation. The caching control unit is a programmable device containing the instruction and data for caching the logical and physical address mapping. The caching instruction and data buffer area temporarily stores the caching instruction and data used by the caching control unit.

Abstract: To provide a power controlling method for use in a storage device which can be operated with less power consumption, at least a storage capacity monitoring unit for monitoring the storage amount of data stored in each storage unit, a power-on unit for controlling the power-on of each storage unit, an access state monitoring unit for monitoring the state of accesses from an upper device to each storage unit, and a power-off unit for controlling the power-off of each storage unit are comprised, thereby controlling the power of a second storage unit.

Abstract: There is provided a logical volume management method for storage system. When a logical volume is created on a flash memory drive, a management computer allocates logical volume while flash memory chip border of flash memory drive is taken into account. Specifically, a table for managing a correlation between each parity group and the flash memory chip of the flash memory drive is obtained and the logical volume is allocated in such a manner that a flash memory chip is not shared by a plurality of logical volumes. When complete erasing of logical volume data is performed, the management computer specifies a flash memory chip on which complete data erasing is to be performed, and the storage system completely erases data exclusively on the chip of interest with a use of a function of completely erasing data at a time by chip unit of the flash memory chip (chip erasing).

Abstract: Provided are a method, system, and article of manufacture, wherein a storage manager application implemented in a first computational device maintains a virtual logical volume that represents a plurality of segments of a linear storage medium of a secondary storage, wherein the virtual logical volume and the plurality of segments are created by the storage manager application. A request for data is received at the first computational device, from a second computational device. The storage manager application moves selected segments of the plurality of segments from the linear storage medium of the secondary storage to a cache storage, in anticipation that the requested data is included in the selected segments that are moved from the linear storage medium of the secondary storage to the cache storage.

Abstract: A plurality of integrated circuits in a system, each having a program memory loaded with different sections of a program, and a second memory. The integrated circuits perform the program, such that, when one of the integrated circuits requires a portion of the program, which is contained in its own program memory, it extracts it from the program memory and uses it, but when it requires a portion of the program, which is not contained in its own program memory, it reads it from the program memory of one of the other integrated circuits into its second memory and runs that portion of the program from there. In one example, the system is a line card, and the program is specific to one DSL protocol.

Abstract: A device driver includes an access permitted directory storage unit and an access-permission determining unit. The access-permitted directory storage unit stores as an access-permitted directory an activation directory for a process that is allowed to access an S memory (private memory). The access-permission determining unit checks whether an activation directory for a process that has requested for access to the S memory matches the access-permitted directory. Based on the result, the access-permission determining unit determines whether to accept the access request.

Abstract: Provided are a method, system, and article of manufacture for relocating a logical volume from a first storage location to a second storage location using a copy relationship. An operation is initiated to move a logical volume from a first storage location to a second storage location. A relationship is established between the first and second storage locations to copy data in the logical volume from the first storage location to the second storage location. A read request is received to data in the logical volume while copying the data in the logical volume from the first storage location to the second storage location. A determination is made, in response to the read request, whether the requested data is at a first copy of the logical volume in the first storage location or a second copy of the logical volume at the second storage location.

Abstract: A system for increasing the efficiency of migrating, at least in part, a virtual machine from a source host to a destination host is described wherein the content of one or more portions of the address space of the virtual machine are each uniquely associated at the source host with a signature that may collide, absent disambiguation, with different content at the destination host. Code in both the source and destination hosts disambiguates the signature(s) so that each disambiguated signature may be uniquely associated with content at the destination host, and so that collisions with different content are avoided at the destination host. Logic is configured to determine whether the content uniquely associated with a disambiguated signature at the destination host is already present in the destination host memory, and, if so, to back one or more portions of the address space of the virtual machine having this content with one or more portions of the destination host memory already holding this content.

Abstract: The use of a token-based memory protection technique may provide memory protection in a computer system employing memory virtualization. A token-based memory protection technique may include assigning a unique identifier to an application, process, or thread, and associating the identifier with a block of memory allocated to that application, process, or thread. Subsequent to assigning the identifier, a packet requesting access to that block of memory may include a token to be compared to the identifier. A memory controller may be configured to associate the identifier with the block of memory and to compare the token in the memory request packet to the identifier before granting access. If a second block of memory is subsequently allocated to the application, process, or thread, the identifier may be disassociated with the first block of memory and associated with the second block of memory.

Abstract: A storage apparatus and data protection method that can substantially improve the use efficiency of volumes. A virtual first volume is provided to a host apparatus, and a storage area with a necessary capacity from among one or more storage areas is dynamically allocated to the first volume in response to a write access request from the host apparatus; and write data from the host apparatus is stored in the storage area, and an access attribute representing the possibility or impossibility of access is set for the storage area.

Abstract: When a first channel processor from among a plurality of channel processors receives an I/O request from a host system, a second channel processor, which is to execute a part of the processing to respond to the I/O request, is selected from among the channel processors based on the LM directories of the respective channel processors. The selected second channel processor checks whether there is a cache hit. If there is a cache hit, it transfers the data from the cache memory to the buffer memory. The first channel processor then processes the I/O request using the data transferred to the buffer memory.

Abstract: Provided are a method, system, and article of manufacture, wherein a storage manager application implemented in a first computational device maintains a virtual logical volume that has a plurality of segments created by the storage manager application. At least one additional copy of at least one of the plurality of segments is maintained in at least one linear storage medium of a secondary storage. A request for data is received, at the first computational device, from a second computational device. At least one of the plurality of segments and the at least one additional copy are used to respond to the received request for data.

Abstract: A disk array system having first and second housings and a controller for controlling the first and second housings. Fiber channel hard disk drives are received in the first housing, and serial ATA hard disk drives are received in the second housing. When reading data stored in a serial ATA hard disk drive in the second housing, the controller reads a plurality of pieces of data including the data to be read and parity data for the plurality of pieces of data from all the hard disk drives of an RAID group to which the hard disk drive storing the data to be read belongs. Thus, the controller examines whether the plurality of pieces of data including the data to be read are written in the hard disk drives with erroneous contents or not.

Abstract: A method, system, device, and article of manufacture for use in a computer memory system utilizing multiple page types, for handling a memory resource request. In a accordance with the method of the invention, a request is received for allocation of pages having a first page type. The first page type has a specified allocation limit. A determination is made in response to the page allocation request of whether the number of allocated pages of the first page type exceeds or is below the allocation limit. In response to determining that the number of allocated pages of said first page type is below the allocation limit, the virtual memory manager enables allocation of pages for the request to exceed the allocation limit.