Patents Examined by Chae M Ko
  • Patent number: 12670064
    Abstract: The present disclosure provides an integrated circuit comprising a memory controller configured to transmit information stored in a memory to a processing unit. An example memory controller includes an error detection circuit configured to detect an error in the information by implementing an error correcting code algorithm, and to generate an interrupt signal in the event of detection of at least one error in the information and a transmission control circuit configured to transmit the interrupt signal to the processing unit only when the error is detected for the first time in the information by the error detection circuit.
    Type: Grant
    Filed: January 6, 2025
    Date of Patent: June 30, 2026
    Assignee: STMicroelectronics International N.V.
    Inventors: Jerome Lacan, Raphael Clauss, Gerald Briat
  • Patent number: 12670079
    Abstract: A gateway device collects equipment data and judges whether or not there is any anomaly in the collected equipment data according to a judgement rule(s). An analysis server having an analysis unit transmits and receives information to and from the gateway device and analyzes the received information. An input-output unit executes input and output of the server judgement rule(s), and the gateway device transmits data including a judgement result and the equipment data to the analysis server, wherein the analysis server analyzes the transmission data, and if equipment data indicating an anomaly different from an anomaly defined by the judgement rule(s) exists in the equipment data, the analysis server updates information of the server judgement rule(s) based on input information and transmits the updated information to the gateway device; and the gateway device updates information of the judgement rule(s) based on the server judgement rule information.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: June 30, 2026
    Assignee: HITACHI INDUSTRIAL EQUIPMENT SYSTEMS CO., LTD.
    Inventor: Hiroki Yamada
  • Patent number: 12664049
    Abstract: A Data Storage Device (DSD) includes at least one disk and at least one memory storing an active Primary defect List (P-List) indicating defective sectors identified during formatting, a Grown defect List (G-List) indicating defective sectors identified after formatting, and an inactive P-List including entries for accepting entries from the G-List. Entries of the G-List are merged into the P-List by successively reassigning descending sets of logical addresses from respective sets of sectors to a temporary storage area and reserving at least a portion of the sectors for a set of shifting P-List entries. Entries of the shifting P-List entries are retained in the inactive P-List for grown defect sectors, and the set of shifting P-List entries is reduced by the number of retained entries before shifting toward a next set of sectors. The descending sets of logical addresses are reassigned from the temporary storage area back to non-defect sectors.
    Type: Grant
    Filed: December 25, 2024
    Date of Patent: June 23, 2026
    Assignee: Western Digital Technologies, Inc.
    Inventor: Ryoji Fukuhisa
  • Patent number: 12657107
    Abstract: A method for outputting information in a printing process, includes: acquiring, from an image forming apparatus, a log including a piece of interruption information for each of a plurality of interruption factors; aggregating, for each of the interruption factors, a plurality of pieces of the interruption information; and outputting the interruption information aggregated for each of the interruption factors. The interruption information is output in a matrix where a first axis indicates the interruption factors and a second axis indicates a preset time period, an operator of the image forming apparatus, or the image forming apparatus.
    Type: Grant
    Filed: September 19, 2024
    Date of Patent: June 16, 2026
    Assignee: Konica Minolta, Inc.
    Inventor: Tetsuren Nogawa
  • Patent number: 12639177
    Abstract: A method for fault-tolerant operation of a processing unit having a plurality of sub-processing units. Each sub-processing unit is configured to process one or more partwords and to determine a result partword therefrom. The processing unit can be configured in a plurality of operation modes and is configured to process partwords of input words, which are arranged in sections of the input words, in the sub-processing units corresponding to the sections, and to determine an output word from the result partwords determined thereby depending on the operation mode. The method includes: determining adaptation partwords from input words to be processed that are suitable for processing in at least one fault-free sub-processing unit, and forming adaptation input words, in which the adaptation partwords are arranged in sections corresponding to the fault-free sub-processing unit; and processing the adaptation input words in a second operation mode to determine an adaptation output word.
    Type: Grant
    Filed: August 29, 2024
    Date of Patent: May 26, 2026
    Assignee: ROBERT BOSCH GMBH
    Inventors: Jan Micha Borrmann, Michael Beyer, Andre Guntoro
  • Patent number: 12639190
    Abstract: Embodiments of the present disclosure are directed to sampling telemetric values of computing devices in an efficient manner. Generally speaking, embodiments described herein are directed to sampling counters and gauges of computing devices in a network, data center, etc. in a way that reduces redundant and non-informative signals, while being adaptive when sampling with high granularity desirable. According to one embodiment, counters can be correlated with each other, sharing residual information, and therefore, sampling only a subset of them, or a “representative” can be sufficient in representing a current state. When there is a notable change in the representative, the telemetry sampling procedure can increase its granularity and sample not only the representative but also the underlying group of telemetric values.
    Type: Grant
    Filed: June 4, 2024
    Date of Patent: May 26, 2026
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Yacob Penso, Ran Sandhaus, Vladimir Shalikashvili
  • Patent number: 12613777
    Abstract: Some examples of the present application provide a memory system. The memory system includes a memory device and a memory controller coupled to the memory device. The memory device includes a page buffer; the page buffer includes a latch. The memory controller is configured to in response to a program state being incorrect occurring when the memory device performs a program operation, obtain data in the latch. The memory controller is further configured to obtain at least part of recovered data with the obtained data in the latch.
    Type: Grant
    Filed: July 31, 2024
    Date of Patent: April 28, 2026
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Teng Zhou, Dezhi Yang, Xiao Shao
  • Patent number: 12608263
    Abstract: A power state framework executes a workload in supported computing device types and configurations during a sequence of power state transitions to simulate user experiences. Workloads can be combined, e.g., default workload plus add-on workload(s). Device states are monitored, collected, reported, and analyzed to identify faults, which are prioritized for repair, e.g., based on the projected impact of the faults on users, e.g., if the users were to experience the faults. Computing device states include states of attached peripheral devices and wireless or wired connectivity before and after power state transitions. Device state indicates device stability throughout supported device power state transitions. Devices under test can be on debuggers during execution of workload and power state transitions.
    Type: Grant
    Filed: May 23, 2024
    Date of Patent: April 21, 2026
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: James Christopher Lucero, Jonathan Michael Blair, Bradley Robert Martin, Rathi Kartheek, Miguel A. Claudio, Al Zarko, Alexei Aleksenko
  • Patent number: 12591497
    Abstract: Techniques are disclosed for detecting a drift experienced by computing system(s). The system generates multiple snapshots as part of a drift detection process. Each snapshot contains state information of a computing system. Based on the snapshots, the system generates metrics sets according to a general specification. The general specification defines metrics generally suitable for detecting drift in the computing system(s). Based on the circumstances of the drift detection process, the system generates a custom specification. The system optionally employs trained machine learning model(s) for custom specification generation. The custom specification defines modifications to the metric sets designed to make the metric sets more suitable for the circumstances of the drift detection process. The system modifies the metric sets according to the custom specification.
    Type: Grant
    Filed: September 30, 2024
    Date of Patent: March 31, 2026
    Assignee: Oracle International Corporation
    Inventors: Gaurav Kumar, Prashant Kumar, Nagarajan Muthukrishnan, Prasanna Venkatesh Ramamurthi, Binoy Sukumaran, Nirmala Sreekantaiah
  • Patent number: 12585526
    Abstract: Proposed are concepts pertaining to aiding fault diagnosis through the consideration of the relevance of different log files to a fault. In particular, embodiments of the invention propose generating predicted relevance scores for different log files, and/or content contained therein. The most relevant log file(s), or parts thereof, may then be prioritized for provision to an engineer, for example.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: March 24, 2026
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Qi Gao, Meru Adagouda Patil, Soubhik Paul, Nagaraju Bussa
  • Patent number: 12579015
    Abstract: A computer-based method for updating risk analysis parameters of a proactive risk analysis of a technical system, such as of an FMEA analysis for example. The method uses incident report data obtained during posterior operation of the technical system, compares these incident report data with data of the proactive risk analysis, and updates the said risk analysis parameters in function of said comparison.
    Type: Grant
    Filed: November 24, 2023
    Date of Patent: March 17, 2026
    Assignee: ION BEAM APPLICATIONS SA
    Inventors: David Menichelli, Andreas Lämmerzahl, Christoph Bert, Dominik Kornek
  • Patent number: 12566666
    Abstract: Encoding methods based on erasure code are disclosed, and a distributed system, a device and a storage medium are provided. The method comprises: acquiring K data blocks of data to be processed; dividing the K data blocks into L data groups, wherein each data group at least comprises K encoding parameters respectively corresponding to the K data blocks, and K and L are integers greater than 1; and for each data group, performing encoding by using at least part of data blocks in other data groups and encoding parameters, which correspond to the at least part of data blocks, in the present data group, to generate a local reconstruction parity block of the present data group. The data groups and the local reconstruction parity blocks are stored in data nodes of a distributed system.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: March 3, 2026
    Assignee: HANGZHOU ALICLOUD FEITIAN INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Shuzhan Wei, Yafei Zhao, Junqing Gu, Yuanyuan Dong, Liang Chen
  • Patent number: 12561189
    Abstract: A management system manages one or more infrastructures, and a processor of the management system executes a plurality of consecutive processes on the infrastructure in response to a request, determines whether an error occurs during execution of the plurality of consecutive processes, selects a handling based on at least one of a classification of the error, an execution status of the processes, and a preset handling start condition when the error occurs, and executes the selected handling.
    Type: Grant
    Filed: August 26, 2024
    Date of Patent: February 24, 2026
    Assignee: Hitachi Vantara, Ltd.
    Inventor: Jun Nakajima
  • Patent number: 12561217
    Abstract: Devices and techniques for estimating lifelong data traffic of a memory device are described herein. A system includes a processing device and memory configured to store instructions to perform operations comprising: receiving a history of memory accesses to a device under test during execution of an application; identifying a partition size associated with the application; determining an address offset value based on the partition size and the application; and repeatedly applying the memory accesses over a number of iterations, the application of the memory accesses constrained to the partition size, and the memory accesses applied with each iteration beginning at an address based on a multiple of the address offset value to produce an estimation of data traffic.
    Type: Grant
    Filed: July 24, 2024
    Date of Patent: February 24, 2026
    Assignee: Micron Technology, Inc.
    Inventors: Salvatore Comitato, Felice Cosenza, Graziano Leone, Lucia Santojanni, Nicola Colella
  • Patent number: 12561220
    Abstract: A logging system is disclosed, which is set with a primary filtering level and a secondary filtering level. A log message is saved in a log stream with a log level higher than or equal to the secondary filtering level in a buffer region. In response to a log filtering flag being set to the primary filtering level, a log message in the buffer region is output with the log level higher than or equal to the primary filtering level to a target region. In addition, all log messages in the buffer region to the target region are output in response to the log filtering flag being set to the secondary filtering level. Beneficially, unnecessary log messages are avoided from being output to the target region, while ensuring that required log messages are output to the target region, thereby improving the quality of log files.
    Type: Grant
    Filed: September 4, 2024
    Date of Patent: February 24, 2026
    Assignee: Dell Products L.P.
    Inventors: Xiajun Zhu, Mei Meng, Zhenhua Meng
  • Patent number: 12554589
    Abstract: An embodiment provisions a Validation Area within a consistency group of a primary site and a Validation Area within a consistency group of a secondary site. The embodiment provisions a Validation Writer in the primary site and provisions a Validation Reader in the secondary site; the Validation Writer writes a validation metric into the Validation Area in the primary site at an interval determined by a recovery point objective. The embodiment also reads the validation metric by the Validation Reader in the secondary site, computes a validation result based on the validation metric, the recovery point objective and a recovery point time delta where the validation result comprises an outcome of a replication of the primary site to the secondary site where the Validation Area of the primary site, the Validation Area of the secondary site, the Validation Writer and the Validation Reader are storage and application agnostic.
    Type: Grant
    Filed: December 8, 2023
    Date of Patent: February 17, 2026
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Veeraraghavan Walajapet Deenadhayalan, Brian D. Hatfield, Paul Henri Muench
  • Patent number: 12554610
    Abstract: A computer system is provided. The computer system may be programmed to: (a) receive appliance data relating to a first appliance; (b) compute, using an artificial intelligence model, a predicted remaining lifetime of the first appliance based upon the received appliance data, wherein the artificial intelligence model is trained based upon historical appliance data including historical lifetimes of appliances; and/or (c) transmit content data to a user device that, when received by the user device, causes the user device to generate a user interface including at least the predicted remaining lifetime.
    Type: Grant
    Filed: May 15, 2024
    Date of Patent: February 17, 2026
    Assignee: State Farm Mutual Automobile Insurance Company
    Inventors: Alexander Cardona, Michael P. Baran, Daniel Wilson
  • Patent number: 12536061
    Abstract: An approach is provided for controlling an alert suppression policy. Using historical training data and for a time period, an expected alert reduction for an alert suppression policy (ASP) is computed. The ASP is recommended for an information technology (IT) environment. During runtime and for the time period, an observed alert reduction for the ASP is computed. A visualization of a benefit of the ASP is generated by generating a visualization of a comparison of the observed alert reduction and the expected alert reduction. An explanation of why the ASP is recommended for the IT environment is generated by determining persistent regions for respective event time series from the historical training data and generating a visualization of the persistent regions on a time graph that includes a duration and a number of events for a given persistent region. Each event time series corresponds to a given resource for the ASP.
    Type: Grant
    Filed: October 15, 2024
    Date of Patent: January 27, 2026
    Assignee: International Business Machines Corporation
    Inventors: Ruchi Mahindru, Seema Nagar, Stephen James Hussey, Ian Manning, Harshit Kumar, Karan Bhukar, Amitkumar Manoharrao Paradkar
  • Patent number: 12530249
    Abstract: Accuracy, efficiency, and speed improvements for error alerting are provided herein, particularly in the context of error detection and alerting. There are provided systems and methods for scalable error alerts threshold based on conversion metrics for data processing flows. A service provider may utilize different computing services for data processing to provide different computing services to users, such as via websites and/or applications of the service provider. Due to timeouts, failures, and other errors, users may be unable to complete a data processing flow. To provide dynamic error alerting, thresholds for reporting of the errors may be adjusted based on conversion metrics for users abandoning the processing flow at different steps. A threshold for a number of users that fail to complete the flow at certain steps may be adjusted to account for users that may abandon due to errors or other reasons.
    Type: Grant
    Filed: June 4, 2024
    Date of Patent: January 20, 2026
    Assignee: PAYPAL, INC.
    Inventors: Adhish Nayanendu Vyas, Norihiro Edwin Aoki, Ian Barile
  • Patent number: 12524328
    Abstract: A control device, which controls a device equipped in a vehicle by executing a program, the control device comprising: a storage unit that stores the program; and a processor, the processor being configured to be capable of executing a verification operation of partially executing and verifying the program after starting execution of the program stored in the storage unit, and change an execution mode of the verification operation according to a load state of the processor.
    Type: Grant
    Filed: August 18, 2023
    Date of Patent: January 13, 2026
    Assignee: HONDA MOTOR CO., LTD.
    Inventor: Hisahiro Kato