Abstract: There is provided a method for employing a trigger point in a logic flow. The trigger point has at least one function associated therewith. A default strategy set is associated with the at least one function of the trigger point. The default strategy set has a capability of being replaced, in whole or in part, by a non-default strategy set. The strategy sets are for implementing the at least one function of the trigger point. The trigger point is dynamically configured, including establishing at least one context for the trigger point that respectively specifies a location of the strategy sets. The trigger point is executed when encountered during an execution of the logic flow, including selectively executing at least a portion of at least one of the default strategy set and the non-default strategy set based upon a current context from among the at least one context.

Abstract: A unique comment keyword is given to a comment statement in a source code. If the comment statements are insufficient, a comment including the comment keyword is inserted in this insufficient part thereof. After this processing, the comment statements are extracted from the source code to create specification data. The specification data is displayed on a display 15. An operator completes the specification data by editing. The comment statement in the source code is replaced with the comment statement in the complete specification data based on the comment keyword being used as a key.

Abstract: A computer code generation tool generates computer code to facilitate development of call detail record (CDR) management tools. The computer code generation tool inputs one or more raw CDR structures and creates a generic CDR structure therefrom. Given a generic CDR structure and one or more raw CDR structures that it encapsulates, the computer code generation tool generates computer code to read data from the raw CDR(s) stored on disk and store that data in the generic CDR. The computer code generation tool can also generate computer code to generate raw CDRs from the data stored in the generic CDR.

Abstract: The present invention discloses a method for determining, in a computer environment, the equivalence, if any, of two blocks of assignment statements in a computer program for use in compiler optimization of source code, program verification, program proving, and like computing tasks. The method, inter alia, successfully eliminates, from a block of assignment statements, all intermediate variables and statements which are identities and also those which are irrelevant to the computation of the output variables and brings the block to a form suitable for comparing two or more blocks of assignment statements. A system for carrying out the above method and a computer program product incorporating the method are also disclosed.

Abstract: This invention provides a data driven automated test engine for GUI applications which is environment based. Data structures are used in connection with a scriptable GUI test tool. The tool generates a GUI map, at least one environment definition (parameter) file, at least one test data (driver) file, and an automated test engine. A separate parameter file is provided for each feature of the GUI. The automated test engine is composed of a plurality of library modules written in the scripting language of the scriptable GUI test tool. The ATE is driven by the test data file and calls upon the GUI map and parameter file. According to the presently preferred embodiment, the scriptable GUI test tool is WinRunner®. The environment definition files and the test data files are preferably generated with a spreadsheet program such a Microsoft Excel®.

Abstract: Provided is a method for performing loop-unrolling optimization during program execution. In one example, a method for loop optimization within a dynamic compiler system is disclosed. A computer program having a loop structure is executed, wherein the loop structure includes a loop exit test to be performed during each loop iteration. The loop structure is compiled during the execution of the computer program, and an unrolled loop structure is created during the compiling operation. The unrolled loop structure includes plurality of loop bodies based on the original loop structure. Further, the unrolled loop structure can include the loop exit test, which can be performed once for each iteration of the plurality of loop bodies.

Abstract: In the data exchange method in a multiprocessor system which has a primary processor and at least one secondary processor which communicate with one another via a system bus, with data being able to be exchanged with an application system via an interface to the primary processor, recurrent standard messages contain application data, so that, first, it is possible for application data to be prescribed during the application of the multiprocessor system, and, second, an application data item used as a polling system can be used to display values of memory cells in the secondary processors on the application system without the user on the application system needing to have any knowledge of the internal structure of the multiprocessor system.

Abstract: A computer. An instruction pipeline and memory access unit execute instructions in a logical address space of a memory of the computer. An address translation circuit translates address references generated by the program from the program's logical address space to the computer's physical address space. Profile circuitry is cooperatively interconnected with the instruction pipeline and configured to detect, without compiler assistance for execution profiling, occurrence of profilable events occurring in the instruction pipeline, and is cooperatively interconnected with the memory access unit to record profile information describing physical memory addresses referenced during an execution interval of the program.

Abstract: A system and method for automatically generating a gopher program is provided. The system invokes a debugger and loads a type library into the debugger. The type library containing information regarding each data type used in a program. The system reads each line of a command file, wherein the command file is comprised of literal text and one or more predefined instructions. For each predefined instruction read, the system calls a corresponding function in the debugger and the debugger returns a numerical offset value based upon information in the type library. The system copies the each line of the command file to an output file, with each predefined instruction replaced with its corresponding offset value.

Abstract: A system and method for managing the installation of equipment, machines or systems. The system comprises tools that are operable to develop and manage an installation plan. The installation plan provides a timetable for the performance of installation tasks. The installation plan may be developed and managed using an information system that is accessible via a network or using a portable remote unit. The method comprises using the tools to develop and manage the installation plan.

Abstract: A method for producing a formatted description of a computation representable by a data-flow graph and computer for performing a computation so described. A source instruction is generated for each input of the data-flow graph, a computational instruction is generated for each node of the data-flow graph, and a sink instruction is generated for each output of the data-flow graph. The computational instruction for a node includes a descriptor of an operation performed at the node and a descriptor of each instruction that produces an input to the node. The formatted description is a sequential instruction list comprising source instructions, computational instructions and sink instructions. Each instruction has an instruction identifier and the descriptor of each instruction that produces an input to the node is the instruction identifier. The computer is directed by a program of instructions to implement a computation representable by a data-flow graph.

Abstract: A system and method for developing a software application for manipulating data associated with an asset are provided. The system includes at least one processing unit. The system further includes at least one memory store operatively connected to the processing unit. The system further includes an extensible N-tier software resident in and executable within the at least one processing unit, wherein N corresponds to a positive integer value. The system further includes an inventory of software components resident in the memory store wherein a plurality of tiers are generated from the inventory of a software components using the N-tier software, each tier being associated with at least one other tier, and each tier comprising a plurality of software components and performing a predetermined function relating to an asset.

Abstract: In a programming model, a machine is represented in an object-oriented language by extending a Machine base class representing a state machine, to form a first class representing a first state machine. Each class extending the base class, includes at least one variable reflecting a state of the machine it represents. Also included are a method for receiving zero or more input parameters and advancing a state of the machine; a method for returning data reflecting a state of the machine; and an optional method that connects an output of one state machine to an input of another state machine. The state machines can be nested (as the classes extending the base class can be nested). A parallel program can be a single instance of a class extending the base class. All machine instances execute concurrently, regardless of where they are declared.

Abstract: A host system for generating a software built-in self-test engine (SBE) is provided for enabling on-chip generation and application of a re-generative functional test on a complex device such as a microprocessor under test. The host system comprises user directives provided to indicate user desired actions; instruction information provided to define a suite of instructions; and a SBE generation tool arranged to generate a software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of a complex device such as a microprocessor under test and activation of a re-generative functional test on the complex device under test (DUT).

Abstract: The invention relates to a method for transparently maintaining cache coherency when debugging a multiple processor system with common shared memory. A software memory map representing the memory usage of the processors in the system to be debugged is created and in the software memory map is an indication of whether or not each processor has a cache. At least two debug sessions associated with two processors are activated. If an active debug session requests a write to a shared memory location, the request is executed and the software memory map is searched to located all processors having read access to that shared memory location. The write request is broadcast to each of the located processors so that each processor can perform any required cache updates.

Abstract: In a development platform, a classifier for a given application defines a data model of an application model as a pattern (an object model) from a finite number of patterns (object models) that represent the possible permutations of data models. In addition, the development platform has a finite number of service objects that perform various functions/services on the object model from which the application model adopts one or more service objects. The object models and the service objects are generic to the development platform and usually a set of finite number of object models and a set of finite number of service objects can interface the application model with the various third party resources and tools.

Abstract: A compiler and method of compiling provide enhanced performance by utilizing a skip list data structure to store various properties of a program at points of interest in the procedure, for example, the properties of the statements in each block in the control flow graph. A special procedure is used to initialize the skip list, prior to performing data flow analysis, to ensure that the skip list structure is not used in an inefficient manner as a result of initialization. Furthermore, special procedures are used to simultaneously scan and compare two skip lists as part of solving dataflow equations.

Abstract: The present invention provides facilities for tagging files or data with attribute information in the form of a file tag (TAGINFO) which contains an identifier for text information (TEXTFLAG) and an attribute (COSID) for identifying encoding schemes. TXTFLAG is an auto conversion flag. Furthermore, a runtime attribute (process CCSLD) is assigned to a process specifying the runtime encoding scheme. A conversion is done automatically by an auto conversion function if both CCSIDs allow a conversion. Files having no file tag are tagged with a virtual file tag by means of an automatic tagging (AUTOTAG) function using heuristic rules for determining whether the data or file contains text or binary information. Old applications must work with untagged files as before. Existing applications should be able to benefit from auto conversion and thereby to be enabled to process new, tagged files without code changes.

Abstract: A computer system and method for compressing an instruction stream and executing the compressed instruction stream without decompression. The invention utilizes a new pointer instruction, i.e., an “Echo” instruction that is used to replace repeated instructions or sequences of instructions, also referred to as phrases. Replacing subsequent, repeated phrases with the Echo instruction reduces the size of the instruction stream, i.e., compresses the instruction stream. The Echo instruction generally identifies at least one literal instruction appearing before the Echo instruction and further identifies the number of instructions appearing before the Echo instruction to be repeated. No additional delimiters are necessary, e.g., no End Echo instructions are required. Omitting the End Echo instruction allows for overlapping phrases without the need for two Echo instructions. Reducing the number of instructions used significantly increases compression.

Abstract: In one embodiment, a method for supporting address translation in a virtual-machine environment includes creating a guest translation data structure to be used by a guest operating system for address translation operations, creating an active translation data structure based on the guest translation data structure, and periodically modifying the content of the active translation data structure to conform to the content of the guest translations data structure. The content of the active translation data structure is used by a processor to cache address translations in a translation-lookaside buffer (TLB).