Patents Examined by Chie Yew
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Patent number: 11966338Abstract: This disclosure provides a method, a computing system, and a computer program product for managing prefetching of pages in a database system. The method comprises obtaining shared information associated with page access, wherein the shared information associated with the page access includes information associated with the page access from a plurality of computing nodes. The method further comprises determining whether to prefetch a number of pages into a global buffer pool based at least on the shared information associated with the page access using a sequential prefetching method.Type: GrantFiled: July 19, 2022Date of Patent: April 23, 2024Assignee: International Business Machines CorporationInventors: Sheng Yan Sun, Xiaobo Wang, Shuo Li, Chun Lei Xu
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Patent number: 11941302Abstract: Techniques for managing disks involve determining performance information of an access pattern of a disk slice based on differences in performance parameters of the access pattern of the disk slice on a plurality of disks. Such techniques further involve determining a score for the disk slice based on the performance information and access frequency information of the disk slice. Such techniques further involve determining a position of the disk slice in the plurality of disks based on the score.Type: GrantFiled: August 17, 2022Date of Patent: March 26, 2024Assignee: Dell Products L.P.Inventors: Hailan Dong, Changyue Dai, Chi Chen
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Patent number: 11886753Abstract: A controller provides a plurality of first sections with numerical information on a first scale. The plurality of first sections are obtained by dividing a recording surface of a magnetic disk in units of first memory areas in each of which a first volume of data can be written by an SMR method. The first scale corresponds to a sequence of the first sections. The controller provides a plurality of second sections with numerical information on a second scale. The plurality of second sections are obtained by dividing the recording surface of the magnetic disk in units of second memory areas in each of which the first volume of data can be written by a CMR method. The second scale corresponds to a sequence of the second sections. The controller executes a plurality of commands in order based on a numerical information on the first scale or the second scale.Type: GrantFiled: March 4, 2022Date of Patent: January 30, 2024Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Takao Abe, Tatsuo Nitta, Takeshi Hara
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Patent number: 11886335Abstract: According to one embodiment, a controller manages a first block set being a set of blocks in which a remaining time is a first time and a second block set being a set of blocks in which a remaining time is a second time. The controller calculates a first rewrite speed based on the first time and a number of blocks included in the first block set. The controller calculates a second rewriting speed based on the second time and a sum of the number of blocks included in the first block set and the number of blocks included in the second block set. The controller determines a maximum rewriting speed among the first rewrite speed and the second rewriting speed. The controller performs the rewrite operation at the determined maximum rewrite speed.Type: GrantFiled: June 13, 2022Date of Patent: January 30, 2024Assignee: Kioxia CorporationInventor: Kazuya Kitsunai
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Patent number: 11880580Abstract: A virtual volume (vVol) is non-disruptively migrated from a first data storage appliance (DSS) to a second DSS. In a synchronizing phase, data is copied from a source vVol to a destination vVol which is not mapped and to which a host computer has no path. Upon completion of synchronization, (1) a mapping is created to the destination vVol for the host and signaled to the host by sending a notification having an associated log page, (2) it is determined whether the host has retrieved the log page, (3) in response the host retrieving the log page, a cutover is performed making the destination vVol accessible to the host and the source vVol inaccessible to the host, and (4) in response to the host not retrieving the log page, the cutover is not performed, leaving the destination vVol inaccessible to the host computer (migration may be aborted or retried).Type: GrantFiled: July 15, 2022Date of Patent: January 23, 2024Assignee: Dell Products L.P.Inventors: Marina Shem Tov, Sathya Krishna Murthy, Furong Cui
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Patent number: 11874770Abstract: An indexless logical-to-physical translation table (L2PTT). In one example, the data storage device including a memory, a data storage controller, and a bus. The memory including a mapping unit staging page that includes a plurality of mapping unit pages and a mapping unit page directory. The data storage controller including a data storage controller memory and coupled to the memory, the data storage controller memory including an indexless logical-to-physical translation table (L2PTT). The bus for transferring data between the data storage controller and a host device in communication with the data storage controller. The data storage controller is configured to perform one or more memory operations with the indexless L2PTT.Type: GrantFiled: May 12, 2022Date of Patent: January 16, 2024Assignee: Western Digital Technologies, Inc.Inventors: Oleg Kragel, Vijay Sivasankaran
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Patent number: 11853201Abstract: A method includes selectively configuring a first subset of non-volatile memory blocks to operate in a single-level mode, configuring the first subset of non-volatile memory blocks to collectively operate as a pseudo single-level cache, writing data associated with performance of a memory operation to the first subset of non-volatile memory blocks, and migrating the data from the first subset of non-volatile memory blocks to a second subset of non-volatile memory blocks.Type: GrantFiled: May 25, 2022Date of Patent: December 26, 2023Assignee: Micron Technology, Inc.Inventor: Donghua Zhou
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Patent number: 11841795Abstract: A storage device includes: a memory device including a plurality of memory blocks; a buffer memory device including first and second buffers which temporarily store write data; and a memory controller for controlling the memory device and the buffer memory device to perform a write operation of storing the write data in the memory device. The memory controller allocates a command to a mapping table including mapping information corresponding to a physical address according to a reception order of the command, when the memory controller receives the command from a host, and controls the buffer memory device such that write data is temporarily stored in a corresponding one of the first and second buffers. When write data temporarily stored in the first or second buffer is flushed to the memory device, the memory controller updates the mapping table, using mapping information corresponding to the flushed write data.Type: GrantFiled: January 28, 2022Date of Patent: December 12, 2023Assignee: SK hynix Inc.Inventor: Min Jun Jang
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Patent number: 11842085Abstract: Methods for modeling performance of tiered storage of a data processing service given an increase in the storage capacity of a warm storage tier of the tiered storage are disclosed. Buffers in the warm storage tier are used to store data block identifiers corresponding to a set of data blocks that would be stored in the warm storage tier given the increase in storage capacity in addition to those already stored in the warm storage tier. When an incoming query targets a data block that has a corresponding data block identifier in one of the buffers, a hit counter is incremented in order to track the hit rate that would be made on the up-sized warm storage tier. In response to adding the data block targeted by the query to the warm storage tier, one or more evictions from the warm storage tier may additionally be triggered.Type: GrantFiled: March 31, 2022Date of Patent: December 12, 2023Assignee: Amazon Technologies, Inc.Inventors: Induja Sreekanthan, Sriram Subramanian, Athanasios Papathanasiou, Vijayan Prabhakaran
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Patent number: 11842084Abstract: Systems and methods for facilitating performance of data tiering by detecting and persisting types of backing storage of cloud volumes that are available for use by a virtual storage system are provided. In one example, during a boot phase of the virtual storage system within a compute instance of a cloud environment, information regarding a type of backing storage for each of multiple storage devices associated with the compute instance that is not available via hypervisor APIs is obtained via an API exposed by the cloud environment. The multiple storage devices may then be initialized to facilitate subsequent use of a subset thereof in connection with performing data tiering by persisting information indicative of the type of backing storage for the storage device within a reserved header region on each storage device.Type: GrantFiled: April 26, 2022Date of Patent: December 12, 2023Assignee: NetApp, Inc.Inventors: Sangramsinh Pandurang Pawar, Vijay Chandra Hanchatey, Per Olov Wahlstrom, William Derby Dallas
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Patent number: 11836393Abstract: A storage system includes: a storage drive having a storage medium storing a data; and a plurality of storage control units having a processor, a memory, and a port to process the data input and output to and from the storage drive, in which information related to a list of the storage control units mounted on the storage system and a maximum number of the storage control units that can be mounted on the storage system is allowed to be stored, and in which, when the storage control unit is replaced, it is determined whether the configuration to be migrated from the storage control unit to be reduced to the storage control unit to be added is migrated directly or via another storage control unit based on the number of the mounted storage control units and the maximum number of the storage control units that can be mounted.Type: GrantFiled: April 6, 2022Date of Patent: December 5, 2023Assignee: HITACHI, LTD.Inventors: Ryosuke Tatsumi, Kazuki Matsugami, Akira Yamamoto, Kenta Shinozuka
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Patent number: 11822486Abstract: Systems, methods, and apparatuses relating to circuitry to implement a pipelined out of order page miss handler are described. In one embodiment, a hardware processor core includes an execution circuit to generate data storage requests for virtual addresses, a translation lookaside buffer to translate the virtual addresses to physical addresses, and a single page miss handler circuit comprising a plurality of pipelined page walk stages, wherein the single page miss handler circuit is to contemporaneously perform a first page walk within a first stage of the plurality of pipelined page walk stages for a first miss of a first virtual address in the translation lookaside buffer, and a second page walk within a second stage of the plurality of pipelined page walk stages for a second miss of a second virtual address in the translation lookaside buffer.Type: GrantFiled: June 27, 2020Date of Patent: November 21, 2023Assignee: Intel CorporationInventor: Christopher D. Bryant
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Patent number: 11809753Abstract: Techniques are described for storing a virtual disk in an object store comprising a plurality of physical storage devices housed in a plurality of host computers. A profile is received for creation of the virtual disk wherein the profile specifies storage properties desired for an intended use of the virtual disk. A virtual disk blueprint is generated based on the profile such that that the virtual disk blueprint describes a storage organization for the virtual disk that addresses redundancy or performance requirements corresponding to the profile. A set of the physical storage devices that can store components of the virtual disk in a manner that satisfies the storage organization is then determined.Type: GrantFiled: October 22, 2021Date of Patent: November 7, 2023Assignee: VMware, Inc.Inventors: Christos Karamanolis, Mansi Shah, Nathan Burnett
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Patent number: 11809732Abstract: A memory data migration method, apparatus, and system are provided. During memory migration, data is classified into two parts based on a hot and cold degree of the data. Hot data is directly migrated, and cold data is written into a shared storage device shared by memories. When needing to be used in a destination-end memory, the cold data may be read from the shared storage device. This reduces an amount of data that needs to be migrated to the destination-end memory, thereby improving memory migration efficiency.Type: GrantFiled: August 23, 2022Date of Patent: November 7, 2023Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Jin Xie, Gang Liu
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Patent number: 11803482Abstract: Process dedicated in-memory translation lookaside buffers (TLBs) (mTLBs) for augmenting a memory management unit (MMU) TLB for translating virtual addresses (VAs) to physical addresses (PA) in a processor-based system is disclosed. In disclosed examples, a dedicated in-memory TLB is supported in system memory for each process so that one process's cached page table entries do not displace another process's cached page table entries. When a process is scheduled to execute in a central processing unit (CPU), the in-memory TLB address stored for such process can be used by page table walker circuit in the CPU MMU to access the dedicated in-memory TLB for executing the process to perform VA to PA translations in the event of a TLB miss to the MMU TLB. If a TLB miss occurs to the in-memory TLB, the page table walker circuit can walk the page table in the MMU.Type: GrantFiled: January 24, 2022Date of Patent: October 31, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Madhavan Thirukkurungudi Venkataraman, Thomas Philip Speier
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Patent number: 11797236Abstract: One example method includes performing delta operations to protect data. During a delta operation, a primary bitmap and a secondary bitmap are processed using bit logic. The delta generated by the delta operation is transmitted to a receiver. The receiver enqueues the delta into a delta queue configured to allow the replica volume at the target site to be moved to any point in time represented by the deltas in the delta queue.Type: GrantFiled: October 27, 2021Date of Patent: October 24, 2023Assignee: EMC IP HOLDING COMPANY LLCInventors: Jehuda Shemer, Ravi Vijayakumar Chitloor
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Patent number: 11775174Abstract: Systems, methods, and computer-readable media for handling I/O operations in a storage system are described herein. An example method includes assigning each of a plurality of storage devices to one of a plurality of tiers; imposing a hierarchy on the tiers; creating a logical volume by reserving a portion of a storage capacity for the logical volume without allocating the portion of the storage capacity to the logical volume; and assigning the logical volume to one of a plurality of volume priority categories. The method includes receiving a write I/O operation directed to a logical unit of the logical volume; and allocating physical storage space for the logical unit of the logical volume in response to the write I/O operation. The physical storage space is located in one or more storage devices. The method includes writing data associated with the write I/O operation to the one or more storage devices.Type: GrantFiled: October 12, 2020Date of Patent: October 3, 2023Assignee: Amzetta Technologies, LLCInventors: Paresh Chatterjee, Vijayarankan Muthirisavengopal, Sharon Samuel Enoch, Senthilkumar Ramasamy
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Patent number: 11762603Abstract: A computer-implemented method for migrating file data in a hierarchical storage environment includes: detecting that a file recalled from a magnetic tape to a primary storage device was modified; determining whether the magnetic tape from which the file was recalled is loaded in a tape drive upon detecting that the file was modified; responsive to determining that the magnetic tape from which the file was recalled is loaded in the tape drive upon detecting that the file was modified, appending only a modified portion of the file to the magnetic tape; and responsive to determining that the magnetic tape from which the file was recalled is not loaded in the tape drive upon detecting that the file was modified, appending the file in its entirety, including the modified portion of the file and any unmodified portions of the file, to a different magnetic tape.Type: GrantFiled: February 10, 2022Date of Patent: September 19, 2023Assignee: International Business Machines CorporationInventors: Tsuyoshi Miyamura, Tohru Hasegawa, Hiroshi Itagaki, Atsushi Abe, Shinsuke Mitsuma, Noriko Yamamoto
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Patent number: 11748019Abstract: One example method includes, at a replication data source, initiating a replication process that includes transmitting a replication stream to a replication destination vault, and data in the replication stream is transmitted by way of a closed airgap between the replication data source and the replication destination vault, switching, by the replication data source, from a transmit mode to a receive mode, receiving, at the replication data source, a first checksum of a file, and the first checksum and file were created at the replication destination vault, receiving, at the replication data source, the file, calculating, at the replication data source, a second checksum of the file, and when the second checksum matches the first checksum, ending the replication process.Type: GrantFiled: October 26, 2021Date of Patent: September 5, 2023Assignee: EMC IP HOLDING COMPANY LLCInventors: Kalyan C. Gunda, Jagannathdas Rath
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Patent number: 11748040Abstract: A technique extends a storage system that includes a first storage resource pool that is generated using a first plurality of storage devices and based on a first storage array standard. Such a technique involves: adding a second plurality of storage devices to the storage system in response to receiving a request to extend the storage system, the number of the second plurality of storage devices being less than the sum of a first stripe width associated with the first storage array standard and the number of backup storage devices in the first storage resource pool; and creating a second storage resource pool using the second plurality of storage devices and based on a second storage array standard, a second stripe width associated with the second storage array standard being less than the first stripe width. Accordingly, storage space can be extended faster and more effectively.Type: GrantFiled: May 11, 2022Date of Patent: September 5, 2023Assignee: EMC IP Holding Company LLCInventors: Sheng Wang, Dapeng Chi, Fang Yuan, Chunhao Ni, Kui Zhai