Abstract: A method of manufacturing a semiconductor device is provided. The method includes placing a package substrate on a carrier substrate, forming a frame on the package substrate, and affixing an active side of a semiconductor die on the package substrate. The semiconductor die together with the frame and the package substrate form a cavity between the semiconductor die and the package substrate. At least a portion of the semiconductor die and the package substrate are encapsulated with an encapsulant. The frame is configured to prevent the encapsulant from entering the cavity.

Abstract: A manufacturing method of a package system includes: providing a base plate with a first thermal interface material (TIM) layer; placing a semiconductor package on the first TIM layer over the base plate, wherein the semiconductor package comprises a plurality of packaging units arranged in an array and a plurality of electrical connectors surrounding the array of the plurality of packaging units; stacking a gasket and a top plate on the array of the plurality of packaging units, wherein the gasket is interposed between the top plate and the array of the plurality of packaging units; and securing the top plate, the gasket, the plurality of packaging units, and the base plate together through a plurality of fasteners, wherein each of the plurality of fasteners is arranged at a gap between two of the adjacent packaging units.

Abstract: A display panel, a manufacturing method therefor, and a display device. The display panel comprising: a base substrate; a plurality of light emitting devices on the base substrate; an encapsulation layer on a side of the light emitting devices away from the base substrate, configured for encapsulating the plurality of light emitting devices; a photosensitive sensor on a side of the light emitting devices away from the encapsulation layer; a color film layer on a side of the encapsulation layer away from the base substrate, comprising a plurality of color film elements; and a light-shielding layer on a side of the encapsulation layer away from the base substrate, comprising a plurality of first openings and a plurality of second openings, the second openings each being filled with a filter element, and the second openings each being used for transmitting light reflected by a finger toward the photosensitive sensor.

Abstract: A display device includes a first substrate, a plurality of light emitting elements that is provided on the first substrate, a second substrate that is provided so as to face a plurality of the light emitting elements, a wall portion that is provided on the first substrate, surrounds an effective pixel area, and supports the second substrate, and a filling resin layer with which a space surrounded by the first substrate, the second substrate, and the wall portion is filled.

Abstract: A semiconductor device is provided. The semiconductor device includes a logic structure overlying a semiconductor substrate of the semiconductor device. The logic structure includes a plurality of logic cells. The semiconductor device includes one or more interconnection layers, overlying the logic structure, in a Back End of Line (BEOL) structure of the semiconductor device. The semiconductor device includes a non-volatile memory array, including a plurality of memory cells, overlying the logic structure and the one or more interconnection layers, wherein the non-volatile memory array at least one of overlies or is within the BEOL structure.

Abstract: This application discloses a chip package assembly, an electronic device, and a preparation method of a chip package assembly. The chip package assembly includes a package substrate, a chip, and a heat dissipation part. The package substrate includes an upper conductive layer, a lower conductive layer, and a conductive part connected between the upper conductive layer and the lower conductive layer. The chip includes a front electrode and a back electrode that are disposed opposite each other, the chip is embedded in the package substrate, the conductive part surrounds the chip, the front electrode is connected to the lower conductive layer, and the back electrode is connected to the upper conductive layer. The heat dissipation part is connected to a surface of the upper conductive layer that is away from the chip. The upper conductive layer, the lower conductive layer, and the conductive part each conduct heat.

Abstract: A semiconductor package includes a frame, a semiconductor chip, a through via, a connection pad, a lower redistribution layer on the bottom surfaces of the frame and the semiconductor chip, a connection terminal on the lower redistribution layer, an encapsulant covering the top surfaces of the frame and the semiconductor chip, and an upper redistribution layer on the encapsulant. The lower redistribution layer includes a lower insulating layer, a lower redistribution pattern, and an under-bump metal (UBM). The upper redistribution layer includes an upper insulating layer, an upper redistribution pattern, an upper via, and an upper connection pad. The lower insulating layer includes an inner insulating pattern surrounding the side surface of the UBM and an outer insulating pattern surrounding the side surface of the inner insulating pattern. The cyclization rate of the inner insulating pattern is higher than the cyclization rate of the outer insulating pattern.

Abstract: Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

Abstract: A display apparatus includes: a display panel comprising a transmission area, a display area, and a middle area that includes at least one groove and is located between the transmission area and the display area; an input sensing layer stacked on the display panel, wherein a metal layer that overlaps the at least one groove in a plan view is in one of the display panel and the input sensing layer.

Abstract: A semiconductor package includes a frame structure having a core portion and a lower pad under the core portion. A cavity penetrates the core portion, and a semiconductor chip is arranged in the cavity and has an active surface on which a bump pad is arranged and a non-active surface facing the active surface. A redistribution structure is positioned under the frame structure and the semiconductor chip, and is connected to the lower pad and the bump pad. A molding member covers the frame structure and the semiconductor chip and fills the cavity. The molding member surrounds a lower surface of the frame structure, the active surface of the semiconductor chip, the lower pad, and the bump pad.

Abstract: A method includes placing a first package component and a second package component over a carrier. The first conductive pillars of the first package component and second conductive pillars of the second package component face the carrier. The method further includes encapsulating the first package component and the second package component in an encapsulating material, de-bonding the first package component and the second package component from the carrier, planarizing the first conductive pillars, the second conductive pillars, and the encapsulating material, and forming redistribution lines to electrically couple to the first conductive pillars and the second conductive pillars.

Abstract: A semiconductor device includes first and second substrates including cell and peripheral circuit regions, first and second gate electrode structures, first and second channels, and first to third transistors. The first and second gate electrode structures include first and second gate electrodes in a vertical direction. The first and second channel extend through the first and second gate electrode structures. The first transistor is on the peripheral circuit region. The second gate electrode structure is on the first gate electrode structure and the first transistor. The second and third transistors are on the second gate electrode structure. The second substrate is on the second and third transistors. The first and second channels do not directly contact each other, are electrically connected with each other, and receive electrical signals from the second transistor. The first and third transistors apply electrical signals to the first and second gate electrode structures.

Abstract: Disclosed herein are multi-layer substrates for integrated circuit packages and methods of making the same. The multi-layer substrate may comprise a plurality of lower layers, at least one core layer, a plurality of upper layers, and a side surface. A first connection and a second connection may extend through or on an uppermost layer of the plurality of upper layers. A trace may be embedded in or on one of the plurality of upper layers, the trace electrically connected to the first connection and the second connection. A first mounting pad and a second mounting pad may be positioned on the side surface and/or the uppermost layer of the plurality of upper layers and a blocking capacitor may be electrically connected to the first mounting pad and the second mounting pad with the second mounting pad electrically connected to the second connection.

Abstract: A display substrate and a display device are provided. The display substrate includes light emitting diode chips, each light emitting diode chip includes light emitting units which respectively emit light of different colors, each light emitting unit includes a first electrode, a light emitting layer, a base and a second electrode, and the base and the second electrode are respectively located at both sides of the light emitting layer. In each light emitting diode chip, the light emitting units share the base and the first electrode, the light emitting layers of the light emitting units emit light of the same color, and at least one light emitting unit further includes a first color conversion layer located at a side of the base away from the light emitting layer, so as to convert first color light emitted by the light emitting layer into second color light.

Abstract: An optoelectronic device package includes a first redistribution layer (RDL), a first electronic die disposed over the first RDL, wherein an active surface of the first electronic die faces the first RDL. The optoelectronic device package further includes a second electronic die disposed over the first RDL, and a photonic die disposed over and electrically connected to the second electronic die. An active surface of the second electronic die is opposite to the first RDL.

Abstract: The present application provides a semiconductor package structure having interconnections between dies, and a manufacturing method of the semiconductor package structure. The semiconductor package structure includes a first interposer including a first substrate and a first interconnect layer over the first substrate; a second interposer disposed over the first interposer, wherein the second interposer includes a second substrate and a second interconnect layer over the second substrate; a first die disposed over the first interposer and adjacent to the second interposer; a second die disposed over the second interposer; a first molding disposed over the second interposer and surrounding the second die; and a second molding disposed over the first interposer and surrounding the first die and the first molding, wherein the first interconnect layer includes a first communication member electrically connecting the first die to the second interposer and the second die.

Abstract: A display device may include pixels disposed on a substrate. Each of the pixels may include a first electrode, a second electrode spaced apart from the first electrode and enclosing a perimeter of the first electrode, light emitting elements disposed between the first electrode and the second electrode, and each including a first end and a second end, a third electrode overlapping the first electrode and the first end of each of the light emitting elements in a plan view, and electrically contacting the first electrode and the first end of each of the light emitting elements, and a fourth electrode overlapping the second electrode and the second end of each of the light emitting elements in a plan view, and electrically contacting the second electrode and the second end of each of the light emitting elements. The light emitting elements may be radially disposed around the first electrode.

Abstract: The present application provides a semiconductor package structure having interconnections between dies, and a manufacturing method of the semiconductor package structure. The semiconductor package structure includes a first interposer including a first substrate and a first interconnect layer over the first substrate; a second interposer disposed over the first interposer, wherein the second interposer includes a second substrate and a second interconnect layer over the second substrate; a first die disposed over the first interposer and adjacent to the second interposer; a second die disposed over the second interposer; a first molding disposed over the second interposer and surrounding the second die; and a second molding disposed over the first interposer and surrounding the first die and the first molding, wherein the first interconnect layer includes a first communication member electrically connecting the first die to the second interposer and the second die.

Abstract: A display panel includes an upper substrate to which external light is incident, a sealing member which is in a non-display area and couples the upper substrate to a lower display substrate. The upper display substrate includes: a base substrate; a light shielding layer and filter layer each corresponding to the non-display area and absorbing a portion of external light which is transmitted through the base substrate at the non-display area, the filter layer and the light shielding layer having different colors from each other. In a first non-display area of the base substrate which corresponds to the sealing member, only one among the filter layer and the light shielding layer is disposed. In a second non-display area of the base substrate which is adjacent to the first non-display area, both the filter layer and the light shielding layer are disposed.

Abstract: A display substrate and a display device are provided. The display substrate includes light emitting diode chips, each light emitting diode chip includes light emitting units which respectively emit light of different colors, each light emitting unit includes a first electrode, a light emitting layer, a base and a second electrode, and the base and the second electrode are respectively located at both sides of the light emitting layer. In each light emitting diode chip, the light emitting units share the base and the first electrode, the light emitting layers of the light emitting units emit light of the same color, and at least one light emitting unit further includes a first color conversion layer located at a side of the base away from the light emitting layer, so as to convert first color light emitted by the light emitting layer into second color light.