Patents Examined by Christine Dang
  • Patent number: 8856742
    Abstract: In an embodiment, a first debug agent at a first computer receives a packet. The first debug agent adds a debug command and an identifier of the first debug agent to the packet and sends the packet to a receiving computer. A second debug agent at the receiving computer removes the debug command and the identifier of the first debug agent from the packet and sends the packet to a second program that executes at the receiving computer. The second debug agent further executes the debug command, which causes the second program that executes on the receiving computer to halt execution at a breakpoint or address watch memory location. The second debug agent sends the state of the second program to the first debug agent, which presents, at the first computer, the state and a listing of the second program.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Steven J. Branda, William T. Newport, John J. Stecher, Robert Wisniewski
  • Patent number: 8805907
    Abstract: It is made possible to provide a random number generation device which generates a physical random number with as little power dissipation as possible. A random number generation device includes: a ring oscillator having at least one set, each set comprising a current noise source and a Schmitt inverter configured to receive an output of the current noise source; and a conversion circuit configured to convert output frequency fluctuation of the ring oscillator to a random number and output the random number.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: August 12, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazutaka Ikegami, Shinichi Yasuda
  • Patent number: 8788552
    Abstract: A deterministic random number generator includes a number series generator adapted to generate an infinite Pi series, a summation generator adapted to generate a partial sum of said infinite Pi series, a computer adapted to compute a finite sequence from said partial sum of infinite Pi series, a shuffler adapted to shuffle said computed finite sequence to obtain a shuffled sequence, a masker adapted to mask said shuffled sequence to obtain a masked sequence, a non-linear function processor adapted to process said masked sequence to obtain a non-linear processed sequence, and a linear feedback shift register adapted to receive and shift bits of said non-linear processed sequence in a pre-determined manner to obtain a deterministic random number and a method for generating a deterministic random number for cryptography and watermarking.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: July 22, 2014
    Assignee: Tata Consultancy Services Ltd.
    Inventors: Natarajan Vijayarangan, Rao Chalamala Srinivasa
  • Patent number: 8782599
    Abstract: A multi-editing mode LOGIC BLOCK object editor is disclosed for creating and modifying LOGIC BLOCK objects that are incorporated into control strategies for process control systems (both distributed and discrete). The editor includes an RPN text editing mode wherein logic incorporated into a LOGIC BLOCK is represented by a list of text instructions. The editor also includes a graphical function block diagram editing mode wherein LOGIC BLOCK logic is defined via instruction shapes dragged/dropped from a pallet and connected via GUI line connection actions by a user. The editor supports automated transitioning between the text and graphics modes wherein conversion of text-to-graphics and graphics-to-text is performed without user intervention. Furthermore, synchronization procedures are performed when LOGIC BLOCK objects are opened in the editor and when transitioning between editing modes to track and/or maintain synchronous status between graphical and text representations of LOGIC BLOCK logic.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: July 15, 2014
    Assignee: Invensys Systems, Inc.
    Inventors: Keith E. Eldridge, Mikhail Vladimirovich Fishbeyn, John P. King, Paul Meskonis, James William Hemenway
  • Patent number: 8768992
    Abstract: Random number generation apparatus (2) is described that comprises a threshold detector (4) and an electrical noise generator (6). The electrical noise generator (6) has at least two channels (8a-8d) and each channel is arranged to generate an electrical noise signal. The threshold detector (4), which may comprise a digital input-output (DIO) card, is arranged to periodically compare this electrical noise signal with a threshold and to provide a binary data output that indicates whether the threshold has been exceeded. Each channel of the electrical noise generator comprises at least two amplifiers (10a-10c) electrically connected in series that preferably provide a gain of 50,000 or more. Use of the random number generation apparatus (2) for quantum cryptography applications is also described.
    Type: Grant
    Filed: February 19, 2007
    Date of Patent: July 1, 2014
    Assignee: Qinetiq Limited
    Inventors: Paul Richard Tapster, Philip Michael Gorman
  • Patent number: 8762971
    Abstract: A method, apparatus and program product are provided for servicing a production program. A mirror program is dynamically created using source code associated with the production program. The mirror program includes enhanced serviceability functionally relative to the production program that generates service information relevant to the production program. The mirror program executes while the production program remains in an active state such that the production program may be serviced using service information generated by the mirror program. The source code used to compile the production program is compared to a base line copy of the source code. Portions of the source code that differ from the base line copy of the source code are stored. The stored portions of the source code are associated with a unique identifier which is saved with the compiled production program.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: June 24, 2014
    Assignee: International Business Machines Corporation
    Inventors: Cary L. Bates, Paul R. Day, Scott W. Elliott
  • Patent number: 8756576
    Abstract: A method, system and program product for providing execution feedback of peer submitted code snippets executed for correction of semantic errors in code. A first developer executing a code snippet to correct a semantic error in the use of a third-party library within a first IDE results in the transmission of an execution result to a collaboration datastore. If the code snippet execution completed with no errors, a result indicating a success is automatically transmitted by the IDE. Further, if the code snippet execution resulted in an error due to error within the code snippet, a result indicating code snippet failure along with error details is automatically transmitted. When a second developer is working on code within a second IDE that contains semantic errors, code snippets to correct the semantic error are presented to the second developer, ranked based on previous execution feedback provided by peer developers.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventor: Swaminathan Balasubramanian
  • Patent number: 8738892
    Abstract: A Very Long Instruction Word (VLIW) processor having an instruction set with a reduced size resulting in a small number of bits being necessary to specify registers. The VLIW processor includes a register file, and first through third operation units, and executes a very long instruction word. Further, the very long instruction word includes a register specifying field which specifies a least one of the registers in the register file and a plurality of instructions. The operand of each instruction includes bits src1, src2, and dst, which indicate whether or not the registers specified by the register specifying field are to be used as the source register and the destination register.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: May 27, 2014
    Assignee: Panasonic Corporation
    Inventors: Takahiro Kageyama, Hideshi Nishida, Takeshi Tanaka, Kouji Nakajima
  • Patent number: 8739133
    Abstract: A method and information processing system facilitate debugging of a multi-threaded application. A control program request associated with at least one thread of a process that has been designated for debugging is generated. The control program request is placed into a memory buffer associated with the thread by the debugger. The memory buffer is passed to a control program. A plurality of memory buffers is monitored. Each memory buffer in the plurality of memory buffers is associated with a different thread of the process. At least one memory buffer in the plurality of memory buffers is determined to include debugging event information from the control program determining. The debugging event information is processed. The processing includes at least one of notifying a user of the debugging event information and generating at least one control program request for a thread associated with the at least one memory buffer.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: May 27, 2014
    Assignee: International Business Machines Corporation
    Inventors: Daniel S. Gritter, MeiHui Wang, Joshua Wisniewski
  • Patent number: 8738675
    Abstract: Novel random number generation methods and random number generators (RNG)s based on continuous-time chaotic oscillators are presented. Offset and frequency compensation loops are added to maximize the statistical quality of the output sequence and to be robust against parameter variations and attacks. We have verified both numerically and experimentally that, when the one-dimensional section was divided into regions according to distribution, the generated bit streams passed the tests used in both the FIPS-140-2 and the NIST 800-22 statistical test suites without post processing. Numerical and experimental results presented in this innovation not only verify the feasibility of the proposed circuits, but also encourage their use as the core of a high-performance IC RNG as well.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: May 27, 2014
    Inventor: Salih Ergun
  • Patent number: 8719792
    Abstract: A method of correcting job control language (JCL) jobs scans a JCL job against a set of JCL syntax rules. The method automatically corrects any syntax errors discovered during the scanning, thereby forming a corrected JCL job. The method then runs the corrected JCL job. If the corrected JCL ends abnormally due to an execution error, the method then automatically determines if the execution error is recoverable. If the execution error is recoverable, the method automatically corrects the recoverable error to form a recovered corrected JCL job. The method reruns the recovered corrected JCL job.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: May 6, 2014
    Assignee: International Business Machines Corporation
    Inventors: Philip R. Chauvet, David C. Reed, Michael R. Scott, Max D. Smith
  • Patent number: 8683436
    Abstract: The subject matter disclosed herein provides methods and apparatus, including computer program products, for providing timers for tasks of process models. In one aspect, an input representative of a temporal constraint for a task of a graph-process model may be received. The temporal constraint defines at least one of a delay or a deadline. The task may be associated with the temporal constraint created based on the received input. The temporal constraint defined to have a placement at the graph-process model based on the type of temporal constraint. The task and the temporal constraint may be provided to configure the process model. Related systems, apparatus, methods, and/or articles are described.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: March 25, 2014
    Assignee: SAP AG
    Inventors: Stefan A. Baeuerle, Marek K. Kowalkiewicz, Marita A. Kruempelmann, Ruopeng Lu
  • Patent number: 8645929
    Abstract: A method and apparatus for producer graph oriented programming and execution. According to one aspect of the invention, a runtime is provided that interprets producer dependency declarations for methods. The producer dependency declarations identify at run time a set of zero or more producers, where a producer is a runtime instantiatable construct that includes at least an instance and a method associated with that instance. The runtime automatically generates and executes, responsive to receiving a designation of a producer of interest whose method has a producer dependency declaration, a producer graph. The producer graph initially includes the producer of interest and is generated, from the producer of interest to source producers, through instantiation of producers based on the producer dependency declarations of the methods of the producers already in the producer graph. The runtime sequences the execution of the producers in the producer graph as indicated by the producer graph.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: February 4, 2014
    Assignee: Murex S.A.S.
    Inventors: Fady Chamieh, Elias Edde
  • Patent number: 8589469
    Abstract: Multiplication engines and multiplication methods are provided for a digital processor.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: November 19, 2013
    Assignee: Analog Devices Technology
    Inventors: Andreas D. Olofsson, Baruch Yanovitch
  • Patent number: 8589878
    Abstract: Various technologies and techniques are disclosed for using heuristics to determine source code ownership. A request is received to identify at least one owner of a particular source code unit. Initial ownership totals are calculated for the source code unit based upon a code contribution heuristic. The code contribution heuristic counts lines of code that were added and that were modified in the totals for contributing users. The initial ownership totals of the particular source code unit are adjusted based upon at least one other heuristic. The at least one owner of the particular source code unit is then output to an output device. The at least one owner is determined by selecting a contributing user that has a highest ranking total after adjusting the initial ownership totals. For example, there can be a primary owner and a backup owner selected based on the ranking of the ownership totals.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: November 19, 2013
    Assignee: Microsoft Corporation
    Inventors: Deon C. Brewis, Jean-Pierre Duplessis, Matthew S. Johnson
  • Patent number: 8572148
    Abstract: A data reorganizer for Fourier Transforms, both forward and inverse, of multiple parallel data streams input to an integrated circuit, and method for use thereof, are described. The data reorganizer has a k input commutator, for k a positive integer greater than zero; an address generator; memory buffers; and an output commutator.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: October 29, 2013
    Assignee: Xilinx, Inc.
    Inventors: Gabor Szedo, Hemang Parekh
  • Patent number: 8555266
    Abstract: A computer-implemented method, apparatus, and computer program product to manage variable assignments in a program. The process identifies a set of variable assignments that is live on a portion of paths to form a set of identified variable assignments. Each of the set of identified variable assignments assign a value to at least one variable of a set of variables. The process determines a set of program points at which the set of identified variable assignments is live on all paths. The process also moves the set of identified variable assignments to the set of program points in response to determining that the set of identified variable assignments is movable to the set of program points.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: October 8, 2013
    Assignee: International Business Machines Corporation
    Inventors: Reid T. Copeland, Mark Graham Stoodley, Vijay Sundaresan, Ning Thomas Wong
  • Patent number: 8473932
    Abstract: Systems and methods that enhance expressibility in a programming language (e.g., Visual Basic) via relaxation of artificial restrictions and extension of delegates associated therewith, without changing the runtime infrastructure. A stub is employed that can replace an impermissible expression in the programming language, to leverage the existing permissible expressions.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: June 25, 2013
    Assignee: Microsoft Corporation
    Inventors: Henricus Johannes Maria Meijer, Brian C. Beckman, Peter F. Drayton, David N. Schach, Ralf Lammel, Avner Y. Aharoni
  • Patent number: 8429598
    Abstract: According to a first aspect there is provided a system to automatically generate software for an object to relational mapping system. The system reads class information respectively associated with a plurality of classes. The system reads meta-data based on the class information. In addition the system automatically generates the plurality of classes based on the meta-data. The plurality of classes to be used in the object to relational mapping system to enable an application program to access data that is persistently stored in a database and accessed by the application program from an instance of a data object class that is included in the plurality of classes. The plurality of classes further includes a first class that is utilized to create the instance of the data object class.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: April 23, 2013
    Assignee: eBay, Inc.
    Inventors: Greg Seitz, Christopher J. Kasten
  • Patent number: 8412758
    Abstract: The invention refers to a pseudo random number generator, PRN, and a method for producing a random number signal, and a system for a fast frequency hopping radio comprising a PRN, and a method for such a system.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: April 2, 2013
    Assignee: Telefonaktiebolaget LM Ericsson (PUBL)
    Inventor: Michael Numminen