Abstract: A semiconductor device includes a semiconductor element, a sealing member, and a first conductive plate. The semiconductor element includes a first electrode. The sealing member seals the semiconductor element. The first conductive plate includes a first surface facing the first electrode inside the sealing member. The first surface of the first conductive plate includes a mounting region, a roughened region and a non-roughened region. The first electrode is joined to the mounting region. The roughened region is located around the mounting region. The non-roughened region is located between the roughened region and an outer peripheral edge of the first surface. Surface roughness of the roughened region is larger than surface roughness of the non-roughened region.

Abstract: A semiconductor device includes a gate structure on a substrate, an insulating interlayer on the substrate and covering a sidewall of the gate structure, a capping layer on the gate structure and the insulating interlayer, a wiring on the capping layer, an insulation pattern on a bottom and a sidewall of an opening extending through the wiring and at least an upper portion of the capping layer, and an etch stop layer on the insulation pattern and the wiring. The insulation pattern includes a lower portion on the bottom of the opening and a lateral portion contacting the sidewall of the opening. A thickness of the lower portion of the insulation pattern from the bottom of the opening in a vertical direction is greater than a thickness of the lateral portion of the insulation pattern from the sidewall of the opening in a horizontal direction.

Abstract: A display device includes first and second areas. The second area includes a display panel including a plurality of light emitting areas respectively overlapping element areas and a non-light-emitting area at least partially surrounding the light emitting areas such that at least a portion of the non-light-emitting area overlaps a peripheral area. A lower cover layer is disposed on the display panel, overlapping the first area and the second area, and including cover patterns respectively overlapping the light emitting areas of the second area. A light blocking pattern is disposed on the lower cover layer overlapping the second area. The light blocking pattern covers a portion of an upper surface of each of the cover patterns.

Abstract: A package structure includes a semiconductor die, a first insulating encapsulant, a plurality of first conductive features, an interconnect structure and bump structures. The semiconductor die includes a plurality of conductive pillars made of a first material. The first insulating encapsulant is encapsulating the semiconductor die. The first conductive features are disposed on the semiconductor die and electrically connected to the conductive pillars. The first conductive features include at least a second material different from the first material. The interconnect structure is disposed on the first conductive features, wherein the interconnect structure includes a plurality of connection structures made of the second material. The bump structures are electrically connecting the first conductive features to the connection structures, wherein the bump structures include a third material different from the first material and the second material.

Abstract: A semiconductor device includes a semiconductor part, first to fourth electrodes, and first and second insulating film. The first and second electrodes are provided on back and front surfaces of the semiconductor part, respectively. The third and fourth electrodes each extend into the semiconductor device form the front surface side. The third and fourth electrodes are electrically insulated from the semiconductor part by insulating films. The semiconductor part includes first to fourth layers. The first layer of a first conductivity type extends between the first and second electrodes. The second layer of a second conductivity type is provided between the first layer and the second electrode. The third layer of the second conductivity type is partially provided between the second layer and the second electrode. The fourth layer of the first conductivity type is provided in the second layer. The fourth layer is apart from the third layer.

Abstract: A display apparatus includes: a substrate including a first area and a second area; and a display element layer including a first display element and a second display element. The first display element includes a first electrode having a first thickness and is located in the first area, and the second display element includes a second electrode having a second thickness, which is less than the first thickness, and is located in the second area. The second display element is provided in plural, and one of the plurality of second display elements and another one of the plurality of second display elements are electrically connected to each other.

Abstract: Provided is a semiconductor device including: a semiconductor substrate having a drift region of a first conductivity type; and a buffer region of the first conductivity type provided between the drift region and a lower surface of the semiconductor substrate and having a higher doping concentration than the drift region. The buffer region has two or more helium chemical concentration peaks arranged at different positions in a depth direction of the semiconductor substrate.

Abstract: A fabrication method includes: forming, over a first dielectric layer between a first metal portion and a second metal portion, a thin film resistor (TFR); forming openings in the first dielectric layer over the first metal portion and the second metal portion; and forming a first bond pad in an opening over the first metal portion and a second bond pad in an opening over the second metal portion; wherein the first dielectric layer is disposed between the first bond pad and the second bond pad, the TFR is formed over the first dielectric layer between the first bond pad and the second bond pad, the TFR has an electrical connection at a first end to the first bond pad and an electrical connection at a second end to the second bond pad, and the TFR provides a resistive path between the first bond pad and the second bond path.

Abstract: Provided is a display device including a driving substrate, a barrier layer disposed on an upper surface of the driving substrate and including a plurality of recesses, a micro-semiconductor light emitting device disposed in each of the plurality of recesses, and a side reflective structure disposed in the barrier layer and provided adjacent to a sidewall of each of the plurality of recesses.

Abstract: An array substrate, a testing method and manufacturing method thereof, and a displaying device. According to the disclosure, a plurality of test capacitors connected in parallel, a first connecting wire, a second connecting wire, a first test terminal and a second test terminal are arranged in an array substrate located in a test area, each test capacitor comprises a first electrode, a first insulating layer and a second electrode which are stacked on a base, and each test capacitor has the same film structure as a storage capacitor arranged in an active area. By making the first electrode of each test capacitor in the test area connected to the first test terminal through the first connecting wire, and the second electrode of each test capacitor connected to the second test terminal through the second connecting wire, the plurality of test capacitors are connected in parallel.

Abstract: A device includes a first transistor including a first drain/source terminal and a second transistor including a first gate terminal. A first conductive path is electrically connected between the first drain/source terminal and the first gate terminal. The first conductive path includes a first conductive via electrically connected between the first drain/source terminal and a first track of a first conductive layer, and a second conductive via electrically connected between the first track of the first conductive layer and a first track of a second conductive layer.

Abstract: A semiconductor device includes a first electrode and a second electrode. The first electrode is connected to a collector layer and a first portion on the collector layer side of a cathode layer. The second electrode is connected to a second portion of the cathode layer excluding the first portion. A work function of the first electrode is larger than a work function of the second electrode, and one of the first electrode and the second electrode and the semiconductor substrate sandwich another of the first electrode and the second electrode in a thickness direction of the semiconductor substrate.

Abstract: A display panel includes two first sub-pixels and two second sub-pixels which are connected as a first virtual quadrilateral. Each of the two first sub-pixels includes a first subordinate sub-pixel and a second subordinate sub-pixel facing to each other and spaced apart from each other. One of two first vertices of the first virtual quadrilateral being located between the first subordinate sub-pixel and the second subordinate sub-pixel of one of the two first sub-pixels, the other one of the two first vertices being located between the first subordinate sub-pixel and the second subordinate sub-pixel of another one of the two first sub-pixels. Two second sub-pixels are respectively located at two second vertices of the first virtual quadrilateral. The two first vertices and the two second vertices are alternately arranged and spaced apart from each other. The display panel includes a third sub-pixel located within the first virtual quadrilateral.

Abstract: An optical coupling device includes a leadframe, a light-emitter, a light-receiver, and first to fourth resins. The light-emitter is located on the leadframe. The first resin is located on the leadframe. The first resin includes first and second portions. The first portion surrounds the light-emitter. The second portion is positioned between the first portion and the light-emitter. A first thickness of the first portion is greater than a second thickness of the second portion. The second resin is located between the light-emitter and the light-receiver in the first direction and is light-transmissive. The third resin is located between the second resin and the light-receiver and is light-transmissive. The fourth resin houses the light-emitter, the light-receiver, and the first to third resins and is light-shielding.

Abstract: A semiconductor device includes: conductive layers and interlayer insulating layers, which are alternately stacked; a select conductor spaced apart from the conductive layers; cell plugs penetrating the conductive layers, the interlayer insulating layers, and the select conductor; and an auxiliary conductor in contact with the select conductor.

Abstract: A display panel includes: a substrate including a main display area and a corner display area; a main pixel located in the main display area and including at least one first main sub-pixel, at least one second main sub-pixel, and at least one third main sub-pixel; and an auxiliary pixel located in the corner display area and including a first auxiliary sub-pixel, a second auxiliary sub-pixel, and a third auxiliary sub-pixel. The number of the at least one first main sub-pixel is greater than each of the number of the at least one second main sub-pixel and the number of the at least one third main sub-pixels, and the first auxiliary sub-pixel is located closer to the main display area than the second auxiliary sub-pixel and the third auxiliary sub-pixel.

Abstract: A display panel and a display device are provided. The display panel includes a first color sub-pixels and a second color sub-pixel. The first color sub-pixel includes a first effective light emitting region, the second color sub-pixel includes a second effective light emitting region. The first color sub-pixel includes a first color light emitting layer, the second color sub-pixel includes a second color light emitting layer, for one second effective light emitting region, along the length direction, a difference between the maximum size of the second color light emitting layer and the maximum size of the second effective light emitting region is a first difference, and along the width direction, a difference between the maximum size of the second color light emitting layer and the maximum size of the second effective light emitting region is a second difference, and the first difference is less than the second difference.

Abstract: A pixel arrangement structure and a display panel. The pixel arrangement structure includes a plurality of sub-pixel units, and each sub-pixel unit of a plurality of sub-pixel units includes a central sub-pixel and a plurality of peripheral sub-pixels surrounding the central sub-pixel. A light emitting color of the central sub-pixel is the same as a light emitting color of the plurality of peripheral sub-pixels. Each of the plurality of sub-pixels includes a plurality of vertex angles, and each of the plurality of vertex angles is provided corresponding to a respective one of the plurality of peripheral sub-pixels.

Abstract: Provided is a semiconductor device including: a buffer region having a doping concentration higher than a bulk donor concentration; a first low-concentration hydrogen peak in the buffer region; a second low-concentration hydrogen peak in the buffer region closer to a lower surface than the first low-concentration hydrogen peak; a high-concentration hydrogen peak in the buffer region closer to the lower surface than the second low-concentration hydrogen peak, the high-concentration hydrogen peak having a hydrogen chemical concentration higher than that of the second low-concentration hydrogen peak; and a flat region including a region between the two low-concentration hydrogen peaks and a region including the second low-concentration hydrogen peak, and having a doping concentration higher than a bulk donor concentration, an average value of the doping concentration being equal to or smaller than a local minimum value of a doping concentration between the second low-concentration hydrogen peak and the high-conc

Abstract: There is described herein a method for fabricating a tunnel junction. The method comprises coating a substrate with an inorganic resist layer and forming support pillars in the resist layer; fabricating a mask on the resist layer from a first inorganic material, the mask having at least one opening; removing the resist layer from beneath the mask, leaving behind the support pillars supporting the mask above the substrate; performing shadow evaporation on the substrate through the at least one opening of the mask to form the tunnel junction on the substrate; and removing the mask and the support pillars from the substrate.