Abstract: A priority scheme is utilized wherein various Instruction Processors possess predetermined levels of prioritization for gaining storage access. Basically, access locking devices used in this environment perform the function of allowing a single port requester to gain unlimited access to the storage unit port while preventing or locking out access by all other requesters seeking access to that same port. In operation, a plurality of pending prioritized port requests are "snapped" into a plurality of input latches. This snapping step is often referred to as a "snapshot". It is only during this "snapshot" period that pending port requests are allowed to enter the priority latches. In past systems, when a port request was made, accompanied by an access lock signal, all port requests presently residing in the priority latches waiting to be serviced were cleared out and no new requests were accepted into the latches until the next "snapshot" was performed.

Abstract: The vector processor of the present invention is designed to have a first function for classifying, generating and storing in advance a separate index set by judging the attribute of specified data and a second function for continuously performing operand access only for the index value belonging to the specified index set out of the index sets generated by the first function, thus avoiding the deterioration of the efficiency of pipeline processing even when the calculation of array data has different operation content according to the attributes of the specified data. Accordingly it can perform continuous calculation of a plurality of different conditioned expressions at high speed by arranging it to operate the first and the second functions concurrently with the value resulting from the operation by the second function being used by the first function as a data for discriminating the attribute of the data.

Abstract: A method of, and system for, building a screen and retrieving related portions of the screen through single button depression. The order with which various portions are built in building a screen is used upon recall of the screen and selection of one portion for controlling selection of related portions. Consider a wheel which is built by building a hub, spokes, rim, and tire in order. Later recall of the wheel and selection of the spokes will permit selection of either the hub or rim upon single button depression.

Abstract: A communicating random access shared memory configuration for a multiprocessor system is connected to the processors for transferring data between the processors. The random access memory configuration includes a plurality of interconnected random access memory chips, each of these memory chips including first and second separate memory bit arrays having N word storage locations of M bit length with M bit buffer connected in between the first and second bit arrays on each memory chip, and first and second input/output ports connected to first and second bit arrays on each chip for entering and removing data externally to and from the chip. A controller is located on each chip and connected to the first and second memory arrays and the M bit buffer for transferring data between the first and second memory arrays and into and out of the first and second input/output ports.