Abstract: An apparatus tests specific processing performed by plural computing machine resources provided by one or plural computers. The apparatus adds an instruction request command to request an instruction from the apparatus at a predetermined position in a source code of the specific processing performed by each computing machine resource, and generates the source code with an additional command.

Abstract: A user interface is provided through which a user may specify a container for data recovery. In response to the specification of a container for recovery, another user interface is provided through which the user can select a consistency group or a journal file to be utilized for recovery. In response to receiving a selection of a journal file for data recovery, a user interface is provided through which a user may specify a point in time, an event, or a snapshot at which time recovery for the corresponding volume should occur. In response to receiving a selection of a consistency group for recovery, a user interface is provided through which a user may specify a snapshot performed across two or more volumes of the consistency group that should be utilized for recovery.

Abstract: A transactional file system developed to function with flash memory is described. The file system performs power-failure detection and ensures data integrity in the event of a power failure. In one described implementation, a power failure event can be detected by a file system, components of the file system, or individual modules in the form or computer-executable instructions and/or logic. Meta-information is stored at a location on a flash medium indicated by a write pointer if a computer device shuts-down according to a normal shutdown mode. During initialization of the computer, a check is performed whether the meta-information is present in the location on the flash medium indicated by the write pointer. If the meta-information is present, then a conclusion is made that the computer shutdown according to the normal shutdown mode.

Abstract: A method for enabling recovery of data stored in a computer network, the computer network comprises a plurality of computer nodes, the method comprising the steps of generating a set of redundancy data based on a predetermined relationship between a first set of data and a second set of data, injecting the first set of data, the second set of data and the set of redundancy data into separate looping paths of the computer network, wherein a looping path is a path along a plurality of computer nodes in which data is transported, and the looping paths are defined in separate communication channels between the computer nodes and pass through at least one common node of the computer network, such that the redundancy data and the second set of data can be used to reconstruct the first set of data based on the predetermined relationship between the first and second set of data when the first set of data is lost, thereby enabling the recovery of data stored in the computer network.

Abstract: An Outage Measurement System (OMS) monitors and measures outage data at a network processing device. The outage data can be stored in the device and transferred to a Network Management System (NMS) or other correlation tool for deriving outage information. The OMS automates the outage measurement process and is more accurate, efficient and cost effective than pervious outage measurement systems.

Abstract: The present invention relates to a method and system for efficiently identifying errant processes in a computer system using an operating system (OS) error recovery method that identifies if the error caused by the errant process can be recovered and, if so, can recover from the error. The method and system of the present invention operates after standard Error Correcting Code (ECC) and parity check bit methods and systems are unsuccessful in recovering from the error. In accordance with an embodiment of the present invention, the method and system includes detecting an error during instruction execution, storing a physical address of an errant process that caused the error, and storing an execution instruction pointer (IP) in a processor including at least one critical memory structure to detect an error and a processor error processing logic hardware coupled to the at least one critical memory structure.

Abstract: Memory accesses in a data processing device (14) can be monitored by selecting, from among a plurality of available memory relationships (37, 82), a memory relationship relative to an address of a reference memory location (B2). When a memory access address bears the selected memory relationship relative to the address, an event (24) can be declared.

Abstract: A system and method for managing a time-limited long-running process that acts upon disks of a disk array is based upon a general rule of acting upon each disk in an order based upon the length of time from when it was last acted-upon. Disks having the greatest last acted-upon time value (e.g. were processed the longest-time ago) are queued first by the process for acting-upon in the present run. The greatest last acted-upon time includes disks that have no prior last acted-upon time (e.g. newly added/mounted disks). A registry key entry is maintained in a registry file for each of the RAID groups that includes the volume's file system identifier (FSID) and particular RAID group identifier to (RGID). The RGID includes the last acted-upon time for the RAID group. This is set to a positive time number if the process has last acted-upon the group to completion.

Abstract: Automatic detection or correction of addresses, such as Uniform Resource Locators, that are user-entered may be provided. A code that is associated with an address may be entered when an address is entered. Errors in the address may be detected and corrected based on the code. The code may be determined for an address based on the string of characters comprising that address. Reed-Solomon techniques, checksum determining techniques, or other such techniques may be used to determine a code of an address. A code may be inserted at the end of an address with a number of particular characters placed in between the code and the address to signal that a code is being used. The address, code, and code-distinguishing characters in between the code and the address may be entered by being typed in or scanned in.

Abstract: A method of providing reset logic in high availability computer systems is disclosed. The illustrative embodiment of the present invention uses probability theory in combination with redundant processors and components to ensure system availability. Detected errors are verified, and malfunctioning processors or components are then changed to a reset state that functionally removes them from the system. Detected errors which can not be verified result in the processor or component that incorrectly detected the error being placed in a reset state. The use of redundant components and processors enable standby processors to be activated to take the place of reset processors quickly enough to maintain system availability.

Abstract: A method and system for performing software versioning between multiple controllers in a fault tolerant system. The fault tolerant system includes a storage system and multiple redundant controllers that provide access to the storage system. The storage system has stored thereon a preferred version of software to be used by the controllers. This software may be updated. The controllers each contain non-volatile memory. On boot, a controller compares the software version in its non-volatile memory to the preferred version in the storage system. If they are different (e.g., the software on the storage system was updated or the controller was updated with a non-preferred software version), then the controller copies the storage system version into its non-volatile memory and then re-boots. One controller is typically left operational while the other is re-booted for redundancy.

Abstract: An application program runs on an embedded processor connected via a link to a host. When the application program identifies a need for communication over said link, it reads a pointer location to see whether its contents represent a valid address in memory, and if so the program calls that address. It then checks the code at the address to see whether an entry point is stored there, and if so uses that entry point to access a subroutine enabling communication over the link.

Abstract: A mechanism is provided for predicting cache array bit line or driver failures. This mechanism checks for five consecutive errors at different addresses within the same syndrome on invocation of event scan polling to characterize the failure. Once the failure is characterized, it is reported to the system for corrective maintenance including dynamic and/or boot time processor deconfiguration or preventive processor replacement.

Abstract: A method and apparatus for emulating hardware bus lock in a multi-architecture computer system includes a fault handler that acquires a semaphore reserved for bus lock and a semaphore that limits access to a page table. The fault handler includes an emulation module that sets a mode bit to prevent the bus lock and allows re-execution of the instruction that caused a request for a hardware bus lock. Using this method, the fault handler ensures a minimum disruption to operation of the computer system by restricting access to the least amount of computer system resources.

Abstract: A coordinate input/detection device compares a waveform of a signal corresponding to intensity distribution of rays received from a coordinate input area by a light-receiving unit and a standard waveform at fixed timing. If the waveform is not equal to the standard waveform, the coordinate input/detection device determines that an installation position of the light-receiving unit is off a correct position because of shock or vibration, and obtains a new standard waveform and stores the new standard waveform in a storage unit, thereby setting the waveform of the signal corresponding to the intensity distribution of rays received by the light-receiving unit located at an incorrect position as the standard waveform.

Abstract: Methods and arrangements are provided that automatically display error information during a logon process or other similar process. The method and arrangements automatically display error information associated with a user input field through the use of non-modal display mechanisms within a graphical user interface. The method and arrangements monitor user input activities and automatically stop displaying the error information upon subsequent user input. The methods and arrangements may also stop the display of the error information after a defined period of time has elapsed. A tip balloon is one type of a non-modal display mechanism that does require the user to respond and does not interfere graphically and/or operationally with the ongoing graphical user interface supported process.

Abstract: To enable a processor connected to a host computer to run programs that are dynamically loaded by the host, a stack is loaded into its memory, and the location of the stack, or information enabling that location to be found are stored in a memory location reserved as a vector. The programs are then dynamically loaded into said memory; and a set location in the stack is used to store the entry point into the dynamically loaded file.

Abstract: A fault tolerant method transforms physically contiguous data in-place on a disk by partitioning the physically contiguous data into an empty region physically adjacent to data regions including a first data region and a last data region, the first and last data regions at opposing ends of the physically contiguous data regions. The physically contiguous data are transformed in an order beginning with the first data region and ending with the last data region. The transforming step perform first locking and reading the first data region, second, transforming the first data region, third, writing and unlocking the transformed first data region to the empty region, and fourth, declaring the first data region as the empty region while declaring the empty region as the first region. The first through fourth steps are repeated for each data region, until completion, to transform the physically contiguous data in-place on the disk.

Abstract: Systems and methods are described for replicating virtual memory translation from a target computer on a host computer, and debugging a fault that occurred on the target computer on the host computer. The described techniques are utilized on a target computer having a processor that has halted execution. Virtual to physical address translation data from the target computer is transferred to the host computer. The host computer utilizes the virtual to physical address translation data to access data pointed by virtual memory addresses that were used by the target computer, and then debugs a fault by accessing the data by reading the physical memory address on the host computer. After the virtual to physical memory address translation data have been acquired, they can be cached at the host computer.

Abstract: A system, method, and apparatus for providing continuous operations of a user application at a user computing device. At least two application servers are provided with each application server running the user application concurrently and independently. Each application server may have a persistent storage device associated with it for storing data. In response to a user request for data processing within the user application, the user request is transmitted to the at least two application servers for processing therein. A return result—responsive to the user request as processed by the one of the at least two application servers—is passed to the user computing device from one of the at least two application servers. In this manner, if one of the application servers fails or becomes unavailable due to a disaster or otherwise, the user requests can be continuously processed by at least the other application server without any delays.