Patents Examined by Chun-Kuan (Mike) Lee
  • Patent number: 7363395
    Abstract: A method according to one embodiment may include determining, at least in part, by an intermediate device at least one communication protocol via which at least one storage device connected to the intermediate device is capable of communicating. In this embodiment, the intermediate device may be capable of controlling, at least in part, by the intermediate device, at least one data stream coming from the at least one storage device in accordance with at least one communication protocol. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: April 22, 2008
    Assignee: Intel Corporation
    Inventor: Pak-Lung Seto
  • Patent number: 7325081
    Abstract: A hardware-controlled data protection scheme can be used on a device providing buffering between two different protocols, especially where at least one of the protocols does not use fixed length blocks. A fixed block size is arbitrarily imposed on the data in order to calculate a cyclical redundancy code (CRC) for the block. Block sizes are restricted to a value of 2n, e.g., 2, 4, 8, 16, etc. The device is able to time-share and to receive or send data on more than one port while sharing the CRC engine between the ports. Intermediate values of the CRC for a given port are temporarily saved in a CRC register file. As a block of data for a given port is completed, a final CRC value for the block is saved to a CRC random access memory (RAM) located on the device and the entry in the register file is cleared. When the data is then output from the device, the CRC for the block is recalculated and checked against the saved value to be sure that they match.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: January 29, 2008
    Assignee: LSI Logic Corporation
    Inventor: David Thomas
  • Patent number: 7313637
    Abstract: Disclosed herein is a computer system provided with a mechanism for connecting a single port disk to an active server and the disk to a standby server when in a fail-over processing. An “add_pci” command issued from a clustering program is used to let a control program change the allocation of a PCI slot while an interruption signal issued to a standby server permits an ACPI processing routine to hot-add a PCI card that includes the disk unit on the subject guest OS.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: December 25, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Tsuyoshi Tanaka, Keitaro Uehara, Yuji Tsushima, Naoki Hamanaka, Daisuke Yoshida, Yoshinori Wakai
  • Patent number: 7277969
    Abstract: On the basis of a period of a timing signal, a signal propagation delay in a device unit, signal propagation delay in the timing signal bus and the data bus, and a setup time of another device unit or a device connected to the data bus, a timing at which noise caused by active connection of the first device to the data bus is propagated to the other device unit or the device is computed in a step of noise propagation computing, and on the basis of the timing computed in the step of noise propagation computing, a connection timing at which the first device unit is connected to the data bus. With thes two steps, a noise caused by active connection of a device unit does not affect other device units and devices connected to the same data bus.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: October 2, 2007
    Assignee: Fujitsu Limited
    Inventor: Ryohei Nishimiya
  • Patent number: 7269672
    Abstract: A design method for a bus system comprising a noise propagation computation step and a connection timing computation step. Based on the cycle of a timing signal, a signal propagation delay in a device unit, signal propagation delays in a timing-signal bus and a data bus, and a setup time in the device unit or device connected on the data bus, the noise propagation computation step computes timing at which, when the device unit is connected on the data bus being active, noise propagates to other device units other than the connected device unit or to the device connected on the data bus. Based on the timing computed in the noise propagation computation step, the connection timing computation step computes connection timing at which the device unit is connected on the data bus.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: September 11, 2007
    Assignee: Fujitsu Limited
    Inventor: Ryohei Nishimiya
  • Patent number: 7072131
    Abstract: A storage device in which file data is divided into multiple blocks for storage on a recording medium. The storage device includes an additional data storing section for storing additional data to be recorded on the recording medium in association with the data to be written, a position determining section for determining recording positions on the recording medium where the blocks should be respectively written, based on the additional data, and a block writing section for writing the respective blocks on the recording positions on the recording medium determined by the recording position determining section. The additional data thus defines a gap length between blocks of recorded data. During a read operation, if the gap length does not comport with the additional data, then an error is assumed.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: July 4, 2006
    Assignee: International Business Machines Corporation
    Inventors: Tomoaki Kimura, Satoshi Tohji