Abstract: A semiconductor device package includes an integrated circuit chip having a plurality of chip pads thereon, and a plurality of ball pads rerouted from the chip pads, and a substrate including a plurality of substrate pads thereon. Solder joints, each physically and electrically connecting a ball pad and a substrate pad, are between the to package and the substrate. A stress-relieving film, which can be a polyimide or other dielectric film, lies away front amend between the package and the substrate. A plurality of via holes or metal regions are in the film at positions corresponding to the solder joints. The solder balls are formed on the package and the substrate or only on the package. The solder joints are through the via holes or attached to the metal regions. The stress-relieving film thus attaches to the solder joints and distributes stress in the solder joints over the stress-relieving film to reduce the probability of cracking the solder joints.

Abstract: Capacitors for integrated circuits with a common polysilicon layer for both MOS gates (274, 276, 278) and capacitor (270) lower plates but with implanted doping for the gates and masked diffusive doping for the capacitor plates.