Abstract: A solid state device has a controller.

Abstract: A method may comprise reading a portion of a predetermined amount of data; identifying a first location, within the portion of the predetermined amount of data, of each instance of a data value; identifying second and subsequent locations, within the portion of the predetermined amount of data, of each instance of the data values of the read portion of the predetermined amount of data; determining separate instances of repeated sequences of values in the identified locations; and compressing at least one of the determined separate instances of repeated sequences of values. The compression may be carried out by replacing each repeated sequence of values with at least a reference to a previous instance of the repeated sequence and a length of the previous repeated sequence.

Abstract: Following a relocation write in which data is relocated without update from an old physical location to a new physical location within the non-volatile memory array, a controller defers an update of a logical-to-physical translation (LPT) entry to associate a logical address of the data with a new physical address of the new physical location, for example, for a time-out period. During deferment of the update to the LPT entry, the controller services a read request targeting the logical address from data at the old physical location. In response to no update to the data being made during deferment of the update to the LPT entry, the controller performs the deferred update to the LPT entry. In response to an update to the data being made during the deferment of the update to the LPT entry, the controller refrains from performing the deferred update to the LPT entry.

Abstract: The technique introduced here involves using a block address and a corresponding generation number as a “fingerprint” to uniquely identify a sequence of data within a given storage domain. Each block address has an associated generation number which indicates the number of times that data at that block address has been modified. This technique can be employed, for example, to maintain cache coherency among multiple storage nodes. It can also be employed to avoid sending the data to a network node over a network if it already has the data.

Abstract: Various embodiments for predicting hardware lifespan by a processor device. For a solid state drive (SSD) device configured with data deduplication mechanisms, a useful remaining lifespan is estimated by examining actual drive write operations in view of prevented drive write operations, thereby obtaining trend information to be applied to at least one drive constant data to predict the useful remaining lifespan of the SSD drive device.

Abstract: Methods and apparatuses for insertion, searching, deletion, and load balancing using a hierarchical series of hash tables are described herein. The techniques disclosed provide nearly collision free or deterministic hash functions using a bitmap as a pre-filter. The hash functions have different priorities and one hashing result will be used to perform main memory access. For the hash functions, two hash bitmaps are used to store valid data and collision information. There is no collision allowed in the hash tables except for the hash table with the lowest priority. The hash tables and bitmaps may be stored in one or more caches in (e.g., a cache of a CPU, Block RAMs in FPGAs, etc.) which perform much faster than main memory.

Abstract: Systems and methods for distributed shared caching in a clustered file system, wherein coordination between the distributed caches, their coherency and concurrency management, are all done based on the granularity of data segments rather than files. As a consequence, this new caching system and method provides enhanced performance in an environment of intensive access patterns to shared files.

Abstract: Embodiments of the disclosure are directed toward a method, a system, and a computer program product for managing virtual storage access method (VSAM) data sets on performance tiers. The method can be used with VSAM data sets. The method can include determining a usage metric for a particular control area from the plurality of control areas. The method can also include prioritizing the particular control areas based on a determined usage metric. The method can also include assigning a prioritized control area to a performance tier of the plurality of tiers as a function of a prioritization of the particular control area and a performance criteria for the performance tier by moving the prioritized control area to the performance tier and updating an index record that associates the prioritized control area to the performance tier.

Abstract: Systems and methods for thread-based memory management may include activating a processing thread. The memory may include a first region and a second region with the first region having several segments. A segment of memory may be allocated for the processing thread. Data associated with an object may be stored in the segment. At the end of processing by the processing thread, a garbage collection process may be performed by the processing thread on the segment allocated to the processing thread.

Abstract: A data storage system includes storage devices and a processing subsystem executing software forming a lower-deck file system and an upper-deck file system. The lower-deck file system presents a volume file from which storage is provided to the upper-deck file system, and units of storage of the storage devices are allocable to the upper-deck file system but are not reserved to it. The volume file is thinly provisioned, and additional units of storage are added dynamically to increase its allocated size in response to demand from the upper-deck file system. The lower-deck file system operates in a mapped mode in which a block address in the lower-deck file system is obtained by a generally arbitrary mapping (e.g., an Inode/IB tree) of a block address in the volume file.

Abstract: In a memory system in which a system clock signal is forwarded from the memory controller to multiple memory devices, the phase of the system clock signal forwarded to the slower memory device is advanced relative to the system clock signal forwarded to the faster memory device by a phase corresponding to the skew on the data links corresponding to the memory devices. This causes the state machine of the slower memory device to change states and advance earlier than the state machine in the faster memory device, and as a result, the data read from both the slower memory device and the faster memory device are unskewed on the data links between the memory controller and the memory devices.

Abstract: The contributions of a virtual storage unit to the utilization of a data storage system may be quantified. A utilization score may be determined for each virtual storage unit for one or more functional components of the data storage system, for example, a front-end adapter, back-end adapter or interface physical storage unit. A utilization score may be determined for the data storage system as a whole by combining the component utilization scores of the virtual storage unit. Component and/or system utilization scores may be visually presented to a user in a manner that enables the user to assess the relative contributions of the virtual storage units to utilization of the component or overall system, respectively. What-if scenarios may be considered using the utilization scores to determine the consequences of moving one or more virtual storage units from one data storage system to another, and a live migration may result.

Abstract: A system and method to implement a tag structure for a cache memory that includes a multi-way, set-associative translation lookaside buffer. The tag structure may store vectors in an L1 tag array to enable an L1 tag lookup that has fewer bits per entry and consumes less power. The vectors may identify entries in a translation lookaside buffer tag array. When a virtual memory address associated with a memory access instruction hits in the translation lookaside buffer, the translation lookaside buffer may generate a vector identifying the set and the way of the translation lookaside buffer entry that matched. This vector may then be compared to a group of vectors stored in a set of the L1 tag arrays to determine whether the virtual memory address hits in the L1 cache.

Abstract: In one embodiment, a method includes storing data received from at least two data sources in a buffer, writing the data from the at least two data sources to regions in a first wrap of a tape on a data-source basis in a first predetermined order, and writing the data from the at least two data sources to regions in the second wrap in a second predetermined order, the second predetermined order being a reverse order relative to the first predetermined order.

Abstract: According to one embodiment, a memory system includes nonvolatile memories each storing data and an address table for acquiring an address of the data, and a control unit which is configured to be capable of accessing the nonvolatile memories in parallel, and issues table read requests for reading the address tables and data read requests for reading the data to the nonvolatile memories in response to read commands from a host. When a table read request and a data read request are issued to a same nonvolatile memory, the control unit processes the data read request in priority to the table read request.

Abstract: Apparatus and method for accelerating processing operations of flash based storage systems are disclosed herein. In some embodiments, an IC component disposed between I/O circuitry and flash storage devices is configured to optimize fulfillment of data read and write requests originating from a network or device external to the flash based storage system using cache memory before involving the flash storage devices.

Abstract: Techniques for dynamically managing the placement of blocks of a logical file between a flash storage tier and an HDD storage tier are provided. In one embodiment, a computer system can collect I/O statistics pertaining to the logical file, where a first subset of blocks of the logical file are stored on the flash storage tier and where a second subset of blocks of the logical file are stored on the HDD storage tier. The computer system can further generate a heat map for the logical file based on the I/O statistics, where the heat map indicates, for each block of the logical file, the number of times the block has been accessed. The computer system can then identify, using the heat map, one or more blocks of the logical file as being performance-critical blocks, and can move data between the flash and HDD storage tiers such that the performance-critical blocks are placed on the flash storage tier.

Abstract: A method, system, and program product comprising, assigning addressable elements of storage devices of a data storage system to groups and subgroups, each subgroup being a member of a respective group of the groups, associating a value with a first group of the groups, wherein the value is derived from attributes of access requests to addressable elements of only a subset of the subgroups that are members of the first group, and based on the value, migrating data of the first group.

Abstract: Disclosed is an improved approach for using advanced metadata to implement an architecture for managing I/O operations and storage devices for a virtualization environment. According to some embodiments, a Service VM is employed to control and manage any type of storage device, including directly attached storage in addition to networked and cloud storage. The advanced metadata is used to track data within the storage devices. A lock-free approach is implemented in some embodiments to access and modify the metadata.

Abstract: A system and method for offset protection data in a RAID array. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to store user data in a first page of a first storage device of the plurality of storage devices; generate intra-device protection data corresponding to the user data, and store the intra-device protection data at a first offset within the first page. The controller is further configured to generate inter-device protection data corresponding to the first page, and store the inter-device protection data at a second offset within a second page in a second storage device of the plurality of storage devices, wherein the first offset is different from the second offset.