Patents Examined by Cuneo Kamand
  • Patent number: 6403896
    Abstract: A substrate for use in packaging of a semiconductor chip having opposing upper and lower surfaces has a lower surface which comprises an outer array of contact pads, a center array of contact pads and a plurality of intermediate pads located between the outer array of contact pads and the center array of contact pads. All of the intermediate pads are electrically connected to the ground ring.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: June 11, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shu Jung Ma, Chi Tsung Chiu, Chang Chi Lee