Abstract: The present invention relates to a process of fabricating semiconductor memory structures, particularly deep trench semiconductor memory devices wherein a temperature sensitive high dielectric constant material is incorporated into the storage node of the capacitor. Specifically, the present invention describes a process for forming deep trench storage capacitors after high temperature shallow trench isolation and gate conductor processing. This process allows for the incorporation of a temperature sensitive high dielectric constant material into the capacitor structure without causing decomposition of that material. Furthermore, the process of the present invention limits the extent of the buried-strap outdiffusion, thus improving the electrical characteristics of the array MOSFET.
Type:
Grant
Filed:
September 14, 1998
Date of Patent:
April 24, 2001
Assignee:
International Business Machines Corporation
Inventors:
Rajarao Jammy, Jack A. Mandelman, Carl J. Radens