Abstract: A semiconductor device has a first conductivity type semiconductor substrate. A second conductivity type first impurity diffusion layer is disposed in a surface region of the semiconductor substrate. A resistance element is configured with a first conductivity type second impurity diffusion layer disposed in the first impurity diffusion layer in the surface region of the semiconductor substrate. In a transistor, a gate is connected to an input portion of the resistance element, a source is connected to the first impurity diffusion layer, and a drain is connected to a voltage source higher than the voltage of the input portion. A current source is connected to the source.

Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of a second conductivity type, first semiconductor regions of the first conductivity type, second semiconductor regions of the second conductivity type, gate insulating films, gate electrodes, an insulating film, first electrodes, a second electrode, and trenches. The first semiconductor regions and the second semiconductor regions are periodically disposed apart from one another in a first direction in which the trenches extend in a stripe pattern.

Abstract: A display device comprises a substrate, a first electrode and a second electrode disposed on the substrate, a first insulating layer disposed on the first electrode and the second electrode, first light emitting elements disposed on the first insulating layer, a first connection electrode disposed on the first electrode to contact first ends of the first light emitting elements and a second connection electrode disposed on the second electrode to contact second ends of the first light emitting elements, a second insulating layer disposed on the first light emitting elements, the first connection electrode and the second connection electrode, second light emitting elements disposed on the second insulating layer, a third connection electrode disposed on the first connection electrode to contact first ends of the second light emitting elements, and a fourth connection electrode disposed on the second connection electrode to contact second ends of the second light emitting elements.

Abstract: A semiconductor device includes a silicon carbide semiconductor body. A first shielding region of a first conductivity type is connected to a first contact at a first surface of the silicon carbide semiconductor body. A current spread region of a second conductivity type is connected to a second contact at a second surface of the silicon carbide semiconductor body. A doping concentration profile of the current spread region includes peaks along a vertical direction perpendicular to the first surface. A doping concentration of one peak or one peak-group of the peaks is at least 50% higher than a doping concentration of any other peak of the current spread region. A vertical distance between the one peak or the one peak-group of the current spread region and the first surface is larger than a second vertical distance between the first surface and a maximum doping peak of the first shielding region.

Abstract: A semiconductor device assembly that includes first and second semiconductor devices connected directly to a first side of a substrate and a plurality of interconnects connected to a second side of the substrate. The substrate is configured to enable the first and second semiconductor devices to communicate with each other through the substrate. The substrate may be a silicon substrate that includes complementary metal-oxide-semiconductor (CMOS) circuits. The first semiconductor device may be a processing unit and the second semiconductor device may be a memory device, which may be a high bandwidth memory device. A method of making a semiconductor device assembly includes applying CMOS processing to a silicon substrate, forming back end of line (BEOL) layers on a first side of the substrate, attaching a memory device and a processing unit directly to the BEOL layers, and forming a redistribution layer on the second side of the substrate.

Abstract: The present disclosure relates to an image pickup device and an electronic apparatus that enable further downsizing of device size. The device includes: a first structural body and a second structural body that are layered, the first structural body including a pixel array unit, the second structural body including an input/output circuit unit, and a signal processing circuit; a first through-via, a signal output external terminal, a second through-via, and a signal input external terminal that are arranged below the pixel array, the first through-via penetrating through a semiconductor substrate constituting a part of the second structural body, the second through-via penetrating through the semiconductor substrate; a substrate connected to the signal output external terminal and the signal input external terminal; and a circuit board connected to a first surface of the substrate. The present disclosure can be applied to, for example, the image pickup device, and the like.

Abstract: A semiconductor structure and a method for forming the same are provided.

Abstract: A power semiconductor device includes: a semiconductor layer of silicon carbide (SiC); at least one trench recessed into the semiconductor layer from a surface of the semiconductor layer; a gate insulating layer disposed on an inner surface of the at least one trench; at least one gate electrode layer disposed on the gate insulating layer to bury the at least one trench; a drift region disposed in the semiconductor layer under the at least one gate electrode layer, including a protrusion in contact with a part of a bottom surface of the at least one trench, and having a first conductivity type; a well region disposed in the semiconductor layer to contact the drift region while surrounding side surfaces and bottom edges of the at least one trench, and having a second conductivity type; and a source region disposed in the well region and having the first conductivity type.

Abstract: In a method of manufacturing a semiconductor device, sacrificial patterns are formed over a hard mask layer disposed over a substrate, sidewall patterns are formed on sidewalls of the sacrificial patterns, the sacrificial patterns are removed, thereby leaving the sidewall patterns as first hard mask patterns, the hard mask layer is patterned by using the first hard mask patters as an etching mask, thereby forming second hard mask patterns, and the substrate is patterned by using the second hard mask patterns as an etching mask, thereby forming fin structures. Each of the first sacrificial patterns has a tapered shape having a top smaller than a bottom.

Abstract: The present invention provides a power device with super junction structure (or referred to as super junction power device). When making a super junction power device, impurity of a second conductive type may be implanted into an epitaxial layer of a first conductive type to form a floating island of the second conductive type and a pillar of the second conductive type successively through a super junction mask (or reticle) after forming the epitaxial layer of the first conductive type, directly through a well mask (or reticle) before or after forming a well of the second conductive type, and directly through a contact mask (or reticle) before or after forming a contact structure. Multiple epitaxial processes and deep trench etching process may not be needed. Therefore, the process is simple, the cost is low and yield and reliability are high.

Abstract: An apparatus includes a drain and a source on opposing sides of an epitaxial layer, a plurality of gates formed in the epitaxial layer, a source contact connected to the source, a gate contact connected to the plurality of gates, a gate-source electrostatic discharge (ESD) diode connected between the gate contact and the source contact, and a breakdown voltage enhancement and leakage prevention structure formed underneath the gate-source ESD diode structure.

Abstract: Devices, and methods of forming such devices, having a material that is semimetal when in bulk but is a semiconductor in the devices are described. An example structure includes a substrate, a first source/drain contact region, a channel structure, a gate dielectric, a gate electrode, and a second source/drain contact region. The substrate has an upper surface. The channel structure is connected to and over the first source/drain contact region, and the channel structure is over the upper surface of the substrate. The channel structure has a sidewall that extends above the first source/drain contact region. The channel structure comprises a bismuth-containing semiconductor material. The gate dielectric is along the sidewall of the channel structure. The gate electrode is along the gate dielectric. The second source/drain contact region is connected to and over the channel structure.

Abstract: A light emitting device includes a first semiconductor laser element, a light reflecting member, a base member, and a wire. The base member includes a frame part forming a frame. The frame part has a step portion inside of the frame, a bonding surface bonded to the bottom part, a first inner surface extending below the bonding surface, a second inner surface extending above the bonding surface, a first planar surface defining a planar surface of the step portion on an upper surface side, and a first electrode layer and a second electrode layer electrically connected to each other. The second electrode layer is disposed on the first planar surface. The wire is bonded to the second electrode layer and electrically connected to the first semiconductor laser element. A width of the bonding surface is greater on a first planar surface side than on an opposite side.

Abstract: According to one embodiment, a display device includes first wiring layers, a second wiring layer, a first insulating layer, first mounting electrodes, a second mounting electrode, a first light emitting element and a second light emitting element. The second mounting electrode is arranged to surround a first mounting electrode and an other first mounting electrode. The first light emitting element is mounted across the first mounting electrode and the second mounting electrode. The second light emitting element is mounted across the other first mounting electrode and the second mounting electrode. The second mounting electrode is electrically connected to the second wiring layer through a second opening of the first insulating layer, in a non-display area.

Abstract: In a silicon carbide wafer in an embodiment, in the photoluminescence signal intensity spectrum obtained after irradiating a laser on one surface of the silicon carbide wafer, the number of peak signals having an intensity more than 1.2 times the average signal intensity of the spectrum is 1/cm2 or less.

Abstract: A gate structure of a field effect transistor includes a first gate dielectric layer, a second gate dielectric layer, and one or more conductive layers disposed over the first gate dielectric layer and the second gate dielectric layer. The first gate dielectric layer is separated from the second gate dielectric layer by a gap filled with a diffusion blocking layer.

Abstract: A semiconductor device according to the present disclosure includes a substrate including a plurality of atomic steps that propagate along a first direction, and a transistor disposed on the substrate. The transistor includes a channel member extending a second direction perpendicular to the first direction, and a gate structure wrapping around the channel member.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, a first conductive feature, a first light-emitting feature, a first pattern and a second pattern. The first light-emitting feature is disposed on the substrate. The first pattern is disposed on the first light-emitting feature. The second pattern is disposed on the first pattern. The first conductive feature is disposed on the substrate and at least laterally overlaps the first pattern. The first light-emitting feature is configured to emit a light of a first wavelength. The first pattern has a first transmittance to the light of the first wavelength. The second pattern has a second transmittance to the light of the first wavelength. The first transmittance is different from the second transmittance.

Abstract: An automatically flushing water heater maintenance system may be provided, the system including a water heater and a water heater controller. The water heater may include an inlet, an outlet, and a flush outlet having a first control valve in flow communication therewith. The first control valve may be configured to control a flow of water and sediment through the flush outlet out of the water heater. The water heater controller may be configured to communicate with the first control valve by transmitting a first control signal to the first control valve, the first control signal configured to cause the first control valve to open or close as part of an automatic flushing process. As a result of the flushing, the useful life of the water heater may be extended, and/or water heater leakage alleviated. Insurance discounts may be provided based upon using the automatic water heater flushing functionality.

Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming a gate layer over the fin; and patterning the gate layer in a plasma etching tool using a plasma etching process to form a gate over the fin, where patterning the gate layer includes: turning on and off a top radio frequency (RF) source of the plasma etching tool alternately during the plasma etching process; and turning on and off a bottom RF source of the plasma etching tool alternately during the plasma etching process, where there is a timing offset between first time instants when the top RF source is turned on and respective second time instants when the bottom RF source is turned on.