Abstract: A method and system for managing memory in a packet switching device is disclosed. The method and system comprises managing the memory as a single FIFO when inserting packets and managing the memory as a plurality of FIFO queues when removing packets. A memory management scheme in accordance with the present invention takes advantage of the nature of packet switching to give an efficient implementation of multiple independent queues in a memory. The key observation that is made is that in a packet switch it is expected that packets may be stored in the memory for a time no greater than the time it takes to fill up the memory. If a packet due to extreme congestion is delayed longer than that, then deleting that packet is an acceptable result.