Patents Examined by D. Chun
  • Method and apparatus for operating a cache memory in a multi-processor
    Patent number: 5113510
    Abstract: A computer system having a plurality of processors with each processor having associated therewith a cache memory is disclosed. When it becomes necessary for a processor to update its cache with a block of data from main memory, such a block of data is simultaneously loaded into each appropriate cache. Thus, each processor subsequently requiring such updated block of data may retrieve the block from its own cache, and not be required to access main memory.
    Type: Grant
    Filed: December 22, 1987
    Date of Patent: May 12, 1992
    Assignee: Thinking Machines Corporation
    Inventor: W. Daniel Hillis