Patents Examined by D. J. Bernard
  • Patent number: 8898412
    Abstract: A computer system is provided, the computer system having a processor and a system memory coupled to the processor. The computer system also includes a Basic Input/Output System (BIOS) in communication with the processor. The BIOS selectively scrubs the system memory during a shutdown process of the computer system.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: November 25, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Louis B. Hobson, Wael M. Ibrahim, Manuel Novoa
  • Patent number: 8886892
    Abstract: A memory module including memory devices, a spare memory device, a multiplexing unit, and a memory buffer is provided. The multiplexing unit is coupled with each of the memory devices and the spare memory device, while the memory buffer is coupled with the multiplexing unit. The memory buffer includes a serial interface over which commands are received from a memory controller. The memory buffer is configured to process the commands and provide the memory controller access to the memory device through the multiplexing unit in response to the commands. Also, in response to at least one of the commands, the memory buffer is configured to direct the multiplexing unit to couple the spare memory device to the memory buffer in place of one of the memory devices for at least a next access of the memory devices.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: November 11, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Larry J. Thayer