Patents Examined by D. Le
  • Patent number: 6764895
    Abstract: A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface. An adhesion layer is formed over at least a portion of the surface. The adhesion layer is formed of RuSixOy, where x and y are in the range of about 0.01 to about 10. The adhesion layer may be formed by depositing RuSixOy by chemical vapor deposition, atomic layer deposition, or physical vapor deposition or the adhesion layer may be formed by forming a layer of ruthenium or ruthenium oxide over a silicon-containing region and performing an anneal to form RuSixOy from the layer of ruthenium and silicon from the adjacent silicon-containing region. Capacitor electrodes, interconnects or other structures may be formed with such an adhesion layer. Semiconductor structures and devices can be formed to include adhesion layers formed of RuSixOy.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: July 20, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Eugene P. Marsh, Brenda D. Kraus
  • Patent number: 6674133
    Abstract: The present invention provides a twin bit cell flash memory device and its fabricating method. The method is to first form a gate oxide layer on the surface of the silicon substrate followed by forming a polysilicon germanium (Si1−xGex, x=0.05˜1.0) layer on the gate oxide layer. Thereafter, an ion implantation process is performed to form at least one insulating region in the polysilicon germanium layer for separating the polysilicon germanium layer into two isolated conductive regions and forming a twin bit cell structure. Then, a dielectric layer is formed on the polysilicon germanium layer and a photo-etching-process (PEP) is performed to etch portions of the dielectric layer and the polysilicon germanium layer for forming a floating gate of the twin bit cell flash memory. Finally, a control gate is formed over the floating gate.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: January 6, 2004
    Assignee: Macronix International Co. Ltd.
    Inventor: Kent Kuohua Chang
  • Patent number: 6630389
    Abstract: In a trench-gate type power MOSFET in which a gate electrode is formed on a gate oxide layer formed on a surface of a wall defining a trench, the trench is annealed by heating, for example, at the temperature between 1050° C. and 1150° C. in a hydrogen atmosphere before the gate oxide layer is formed. The crystal defects generated in a crystal adjacent to the trench are cured by the hydrogen annealing without enlarging the trench horizontal width, so that a trench having a high aspect ratio is provided while leak current at a PN junction is prevented. In addition, the breakdown voltage of the gate oxide layer is prevented from being lowered.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: October 7, 2003
    Assignee: Denso Corporation
    Inventors: Takumi Shibata, Toshiyuki Morishita
  • Patent number: 6627940
    Abstract: A memory-cell array includes a substrate forming parallel first and second trenches. A transistor's upper source/drain region adjoins two of the first and two of the second trenches, and lies above its lower source/drain region. A conductive structure in a first trench associated with the transistor adjoins the upper source/drain region at its first edge. An insulating structure in the associated first trench insulates the conductive structure from a second edge and from a bottom of the associated first trench. A word line, on which is a further insulating layer, is over the upper/source drain region and parallel to the associated first trench bulges into the second trenches. Insulating spaces adjoin the word line laterally. A contact on the conductive structure and in electrical communication with the upper source/drain region connects with a capacitor.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: September 30, 2003
    Assignee: Infineon Technologies AG
    Inventors: Dirk Schumann, Bernhard Sell, Hans Reisinger, Josef Willer
  • Patent number: 6614078
    Abstract: CMOS I/O structures are described which are latchup-immune by inserting p+ and n+ diffusion guard-rings into the NMOS and PMOS source side of a semiconductor substrate, respectively. P+ diffusion guard-rings surround individual n-channel transistors and n+ diffusion guard-rings surround individual p-channel transistors. These guard-rings, connected to voltage supplies, reduce the shunt resistances of the parasitic SCRs, commonly associated with CMOS structures, from either the p-substrate to p+ guard-ring or the n-well to n+ guard-ring. In a second preferred embodiment a deep p+ implant is implanted into the p+ guard-ring or p-well pickup to decrease the shunt resistances of the parasitic SCRs. The n+ and p+ guard-rings, like the guard-rings of the first preferred embodiment, are connected to positive and negative voltage supplies, respectively.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: September 2, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Jian-Hsing Lee, Jiaw-Ren Shih, Shui-Hung Chen, Ping-Lung Liao
  • Patent number: 6559028
    Abstract: The method as disclosed reduces the topological step between the uppermost surface of a substrate and the uppermost surface of a shallow trench isolation feature. The method includes the steps of forming a pad oxide layer overlying a substrate, forming a stop layer overlying the pad oxide layer, forming a second oxide layer overlying the stop layer, forming a patterning layer overlying the second oxide layer, and patterning the patterning layer and underlying stack to form an exposed portion of the substrate. The exposed portion of substrate is etched to form a trench, and the remaining portion of the oxidation resistant layer is removed. Further, a dielectric layer is formed overlying the remaining portion of the second oxide layer, and filling the trench. A portion of the dielectric layer is removed to leave the top of the dielectric layer substantially level with the stop layer, and then the stop layer is removed.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: May 6, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Fred N. Hause, Michael B. Allen
  • Patent number: 6544846
    Abstract: A method of manufacturing a memory device including a plurality of cells, each having a first electrode coupled to a first location on semiconductor material, a second electrode coupled to a second location disposed away from the first location on the semiconductor material and a plurality of islands of semiconductor material. The islands are surrounded by an insulator. The islands and the surrounding insulator are formed in pores extending into the semiconductor material between the first and second electrodes. As a result, the memory cells are able to provide consistent, externally observable changes in response to the presence or absence of a single electron on the island.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: April 8, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 6504226
    Abstract: The thin film transistor formed of polycrystalline silicon is positioned adjacent a heat reaction chamber. The gate electrode for the transistor is formed within a silicon substrate and a gate dielectric is positioned over the gate electrode. A pass transistor is coupled to the gate electrode, the pass transistor having a source/drain region in the same semiconductor substrate and positioned adjacent to the gate electrode of the thin film heating transistor. When the pass transistor is enabled, a voltage is applied to the gate electrode which causes the current to flow from the drain to the source of the thin film transistor. The current flow passes through a highly resistive region which generates heat that is transmitted to the heat reaction chamber.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: January 7, 2003
    Assignee: STMicroelectronics, Inc.
    Inventor: Frank R. Bryant
  • Patent number: 6462397
    Abstract: The present invention is related to a bipolar transistor in which the in-situ doped epitaxial Si or SiGe base layer is used instead of using an ion-implanted Si base, in order to achieve higher cutoff frequency. The SiGe base having the narrower energy bandgap than the Si emitter allows to enhance the current gain, the cutoff frequency(fT), and the maximum oscillation frequency (fmax). The narrow bandgap SiGe base also allows to have higher base doping concentration. As a result, the intrinsic base resistance is lowered and the noise figure is thus lowered. Parasitic base resistance is also minimized by using a metallic silicide base ohmic electrode. The present invention is focused on low cost, high repeatability and reliability by simplifying the manufacturing process step.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: October 8, 2002
    Assignee: ASB, Inc.
    Inventors: Byung Ryul Ryum, Tae Hyeon Han, Soo Min Lee, Deok Ho Cho
  • Patent number: 5153395
    Abstract: A switch operated to an open circuit condition by a closed lid of an automatic clothes washing machine. The switch housing is comprised of two parts which mate with each other and with the specially configured switch operating shaft for inhibiting entry of liquids into the switch contact chamber of the housing by splashing or by capillarity. A vent tube leads from the housing and, in effect, accepts air resulting from the air in the housing expanding when the switch is warm and which allows back flow of that air into the housing when the air in the housing cools. The tube prohibits pressure developing in the housing which is negative with respect to ambient atmospheric pressure.
    Type: Grant
    Filed: October 26, 1990
    Date of Patent: October 6, 1992
    Assignee: U.S. Controls Corp.
    Inventors: Spencer C. Schantz, Mike Lehn, Dave Falcon, Steve Lovas
  • Patent number: 5153400
    Abstract: A multiple switch, particularly for switching-on, switching-off and/or switching-over of motor vehicles and the like has at least one roller-shaped contact roller with a generated contact surface liftable from and bringable in contact with at least two rectilinear contact faces located near one another. The contact roller is arranged in a springy deflectable manner in a guiding part displaceable rectilinearly transversely to an axis of the contact roller and parallel to the contact surfaces. The contact roller is provided with bearing pins extending at its end sides outwardly beyond the roller surface, and is linearly displaceable by the bearing pins running over at least one control path with the ramp device so that during a displacement of the guiding part the roller is lifted at its one side from one of the contact faces.
    Type: Grant
    Filed: June 4, 1990
    Date of Patent: October 6, 1992
    Assignee: Merit-Elektrik GmbH
    Inventor: Gunter Merten
  • Patent number: 5151566
    Abstract: A gas circuit breaker having a main fixed element and a main movable element capable of contacting and moving apart from each other, a fixed contact provided on the main fixed element side, a movable contact provided on the main movable element side and capable of contacting and moving apart form the fixed contact, an insulation nozzle provided on the main movable element side to surround the contacts, a hollow nozzle provided inside the movable contact, a cylinder, a puffer cylinder and a fixed piston provided on the main movable element. The insulating nozzle serves to compress a gas in a puffer chamber defined by the puffer cylinder and a fixed piston and to guide the gas to the gap between the contacts disconnected.
    Type: Grant
    Filed: December 28, 1990
    Date of Patent: September 29, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Osamu Koyanagi, Yasuharu Seki, Masanori Tsukushi
  • Patent number: 5149926
    Abstract: An acceleration sensor has a spherical inertial mass (2) formed of a magnetic material. A magnet (3) has a holding part (3a) for normally holding the inertial mass (2) seated thereat. A switch changeover member (5) is actuatable by the inertial mass (2) when the inertial mass (2) moves out of the holding part (3a) onto one surface (3b) of the magnet (3) upon exertion of acceleration having a predetermined or larger magnitude on the inertial mass (2), for changing the position of a switch (4). A magnetic member (6) is secured to the other surface (3c) of the magnet (3), with one end thereof located in the holding part (3a), and the other end thereof shaped to cover an opposed end of the magnet (3), in a manner such that magnetic lines of force are generated in a manner being concentrated around the holding part (3a) of the magnet (3) and on the opposed end of same.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: September 22, 1992
    Assignee: Nippon Seiko Kabushiki Kaisha
    Inventor: Katsuyasu Ono
  • Patent number: 5147989
    Abstract: A detector for detecting a revolution number of an output shaft of a sun-roof driving device of a motor vehicle as a rotary position. This rotary position detector comprises: a rotary disk rotatable in association with the output shaft as being a rotator to be detected; a plurality of guide grooves formed concentrically with the rotary center of the rotary disk and connected to each other by connection grooves; a contact plate opposed to this guide groove; a slider provided on a surface of one end of this contact plate and movable along the guide groove in accordance with the rotation of the rotary disk; a pair of contact points provided at a surface on an end opposite to the slider of the contact plate; a conductive plate, on which the contact points selectively slide, to perform switching; and a device for detecting a position of the contact plate due to the movement of the slider.
    Type: Grant
    Filed: April 16, 1990
    Date of Patent: September 15, 1992
    Assignee: Mitsuba Electric Manufacturing Co., Ltd.
    Inventor: Humio Ito
  • Patent number: 5134307
    Abstract: A commercial alternating current power source is provided to a first frequency converting circuit (PC1) through a filter circuit (F) and a reactor (LAC). A high frequency switching power supply circuit (15) of the first frequency converting circuit is switched in response to the commercial alternating current power source to output high frequency power. The high frequency power is transferred to a second frequency converting circuit (PC2) through dielectric materials in capacitors (C1, C2) using electric field thereof as a transfer medium. In the second frequency converting circuit, a rectifying circuit (70) rectifies the high frequency power, so that a charging circuit 72) charges a back-up battery (BT) in response to a rectified output.
    Type: Grant
    Filed: May 17, 1990
    Date of Patent: July 28, 1992
    Inventor: Hirotami Nakano
  • Patent number: 5130504
    Abstract: Direct current switching apparatus having front and rear arc extinguishing chambers substantially coextensive, the rear chamber being separated into two laterally spaced arc extinguishing chambers, each arc extinguishing chamber comprising rows of non-magnetic parallel splitter plates, a pair of spaced conductors each having a stationary contact element spanning both the front and rear arc extinguishing chambers, power supply terminals connected to the respective spaced conductors, magnetic plates disposed in front of the front chamber and in back of the back chamber having magnetic means providing a magnetic path externally around the chambers, permanent magnets magnetically coupled to at least one of the magnetic plates providing a magnetic field across the respective chambers, a movable contact movable normal to a front to rear direction into and out of bridging engagement with the stationary contacts, and an electromagnetic drive motor disposed coextensive with said arc extinguishing chambers coupled at a
    Type: Grant
    Filed: August 29, 1990
    Date of Patent: July 14, 1992
    Assignee: Eaton Corporation
    Inventors: Peter K. Moldovan, Peter J. Theisen, Mark A. Juds, Robert A. Kihn
  • Patent number: 5128502
    Abstract: A three-pole switch arrangement has for each pole a pole housing, onto which collar-shaped extensions, protruding on the underside, are formed. Provided in the extensions are screw holes, the graduation of which corresponds to the screw coupling, by which the mechanism housing has been screwed to the pole housing. The outer switch poles are oriented outwardly by one graduation and are fastened to the frame by means of screws. Counter to this inclined position, the mechanism housing, rotated by one graduation, is screwed onto the pole housing. It is consequently possible to use the same parts for all three switch poles, and also to transport the switch arrangement pole-by-pole.
    Type: Grant
    Filed: June 21, 1990
    Date of Patent: July 7, 1992
    Assignee: Sprecher Energie AG
    Inventor: Guido Hux
  • Patent number: 5118909
    Abstract: A switch actuator for use with an electrical switch sensitive to changes in air pressure includes a bellows formed of a flexible material. The bellows is attached to a nipple having a passageway for operatively connecting the actuator to the electrical switch. A sleeve is shrink fitted over the outer surface of the nipple, causing the bellows to be lodged between the sleeve and the nipple. The sleeve includes a tubular sidewall with an inwardly-extending flange defining a central opening. A button is slidable relative to the sleeve and includes a projection extending through the central opening to engage the bellows. Pressing the button deforms the bellows, thereby decreasing the volume of a cavity formed between the bellows and the nipple.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: June 2, 1992
    Assignee: Kohler Co.
    Inventor: Thomas J. Husting
  • Patent number: 5103109
    Abstract: An output circuit (62) for generating a signal in the form of a voltage between an output signal node and an output reference node (60) receives power from a pair of voltage regulators (Q1 and 68, Q2 and 70). The regulators are connected in power-circuit series so as to be powered by the difference between the output potentials of two opposite-polarity supplies without a direct low-impedance connection between the power-supply ground (73) and the output reference node (60). To avoid large current flow in any external path between an output reference node (60) of an electronic circuit and the ground node (73) of its power supply, a current sensor (R1, R2, 86) senses the net current that the power supplies provide to the circuitry that includes the regulators, and it controls variable loads (Q3, Q4) that selectively drive current into and draw current from the reference node (60) so as to drive the net current to zero.
    Type: Grant
    Filed: July 3, 1990
    Date of Patent: April 7, 1992
    Assignee: GenRad, Inc.
    Inventors: Moses Khazam, Karl Karash, Charles P. Smith, Anthony J. Suto, Fadi H. Daou