Abstract: An ESD protection circuit for protecting a circuit, comprising a lateral semiconductor-controlled rectifier, a MOS transistor, and a current-sinking device. The lateral semiconductor-controlled rectifier is coupled to the circuit and provided with a first common region and a second common region. The MOS transistor integrated with the lateral semiconductor-controlled rectifier includes the first common region The current-sinking device integrated with the lateral semiconductor controlled rectifier includes the second common region. The current-sinking device shunts the majority of a discharge current when the MOS transistor enters breakdown, thereby increasing the trigger current of the lateral semiconductor-controlled rectifier.