Abstract: An improved approach to examining program strength of non-volatile latches is disclosed. The program strength is able to be evaluated by inferring floating gate charge of memory elements of the non-volatile latches as indicated by current characteristics of the memory elements. Access to the program charge or the internal currents is facilitated by monitoring circuitry provided integral with the non-volatile latches.

Abstract: An apparatus and method for detecting and measuring internal clock jitter is disclosed. In one embodiment, a reference clock generator generates a reference clock signal based on an instantaneous clock signal. The reference clock signal includes the instantaneous clock signal delayed for an average duration. A phase comparing element receives both the instantaneous clock signal and the reference clock signal such that the phase comparing element measures a phase difference between the instantaneous clock signal and the reference clock signal. The magnitude and direction of the phase difference is indicated by one of a number of distinct phase difference bins in the phase comparing element.

Abstract: In a 2.sup.m (m=1, 2, . . . )-valued semiconductor memory device, including a plurality of word lines, a plurality of bit line pairs, and a plurality of memory cells each connected to one of the word lines and one bit line of the bit line pairs, each of the bit line pairs are divided into m divided bit line pairs, and a ratio of capacitances of the m divided bit line pairs is 1:2: . . . :2.sup.m-1. Also, each sense amplifier is connected to one of the bit line pairs. Further, each of coupled capacitor pairs is cross-coupled between two adjacent divided bit line pairs of the divided bit line pairs.