Patents Examined by Dalip Kumar Singh
  • Patent number: 7190366
    Abstract: A method and system for a general instruction capable raster stage that generates flexible pixel packets is disclosed. In one embodiment, the rasterizing of a geometric primitive comprising a plurality of vertices wherein each vertex comprises a respective color value, is performed by a rasterization module of a graphics pipeline. The rasterizing includes a plurality of programmable interpolators for computing pixel parameters for pixels of a geometric primitive. The rasterizing module further includes a memory for storing a first instruction associated with a first programmable interpolator for indicating a first parameter on which said first programmable interpolator is to operate and for indicating a first portion of a pixel packet in which to store its results.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: March 13, 2007
    Assignee: Nvidia Corporation
    Inventors: Edward A. Hutchins, Sekhar Nori
  • Patent number: 7098922
    Abstract: Multiple output buffers are supported in a graphics processor. Each output buffer has a unique identifier and may include data represented in a variety of fixed and floating-point formats (8-bit, 16-bit, 32-bit, 64-bit and higher). A fragment program executed by the graphics processor can access (read or write any of the output buffers. Each of the output buffers may be read from and used to process graphics data by an execution pipeline within the graphics processor. Likewise, each output buffer may be written to by the graphics processor, storing graphics data such as lighting parameters, indices, color, and depth.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: August 29, 2006
    Assignee: NVIDIA Corporation
    Inventors: Rui M. Bastos, John M. Danskin, Matthew N. Papakipos