Abstract: A write buffer for read-write interlocks improves memory access performance by minimizing the latency needed to avoid a read-after-write hazard when a read follows a write to the same memory location. Rather than waiting until a write has been stored in the memory location, the write buffer provides an acknowledgement signal before the data has been stored in memory in order for a subsequent read of the memory location to proceed. The write buffer merges the data to be written with any data that is stored in memory for the read request to return the current data for the read request.
Abstract: A method of improving the Input/Output (I/O) performance of a Redundant Array of Independent Disks (RAID) system using a Matrix Stripe Cache (MSC). The method includes a first step of generating a rxw matrix, that is, a read and write matrix, present before row combination, through a unit MSC that will perform writing on a disk, a second step of generating a rxw matrix, that is, a final read and write matrix, from the rxw matrix present before row combination, which is generated at the first step, through row combination, and a third step of performing reading based on the row-combined rxw matrix generated at the second step, performing an XOR operation on the row-combined rxw matrix on a row basis, and performing writing on the row-combined rxw matrix on a column basis.
Type:
Grant
Filed:
June 8, 2007
Date of Patent:
December 28, 2010
Assignee:
Korea Advanced Institute of Science and Technology
Abstract: In an embodiment, virtual trace records are read and physical trace records are created and displayed. The virtual trace records are associated with virtual processors allocated to logical partitions in a logically-partitioned computer system. Each of the virtual trace records has a wait timestamp, specifying a time at which a virtual processor began waiting to be dispatched and a wait time delta, specifying an amount of time that the virtual processor waited to be dispatched. An execute timestamp is created in each of the virtual trace records, which specifies a time at which the virtual processor was dispatched. The virtual trace records are sorted for each of the virtual processors by the execute timestamp. Physical trace records are created based on the sorted virtual trace records. Each physical trace record describes a dispatch of one of the virtual processors to one of the physical processors.
Type:
Grant
Filed:
April 19, 2007
Date of Patent:
December 14, 2010
Assignee:
International Business Machines Corporation