Abstract: A lighting system includes an LED array having a plurality of LED pixels and a power controller. The power controller adjusts a supply voltage for powering the LED pixels based on one or more conditions of the LED array. The power controller may determine the supply voltage based on process data of the LED array. The power controller may adjust the supply voltage based on an operating temperature of the LED pixels and the amplitude of a current driving the LED pixels.

Abstract: A control system arranged to provide dimming control of light output of one or more light emitting device (124), the control system comprising: a switch mode regulator (91) arranged to provide an output power signal to the one or more light emitting device (124), and to vary the output power signal; one or more feedback sensors (304) arranged to measure characteristic parameters of the output power signal, the characteristic parameters comprising at least one of: current, voltage and power; and a controller arranged to: when a characteristic parameter of the output power signal is above a threshold (210), vary the output power signal in a closed control loop, based on feedback from the one or more feedback sensors (304); and when the characteristic parameter of the output power signal is below the threshold (210), vary the output power signal in an open control loop.

Abstract: An integrated circuit includes a first and second active region, a first insulating region, and a first and second contact. The first and second active regions extend in a first direction, are in a substrate, and are located on a first level. The first active region includes a first drain/source region and a second drain/source region. The second active region includes a third drain/source region. The first insulating region is over the first drain/source region. The first contact extends in a second direction, overlaps the third drain/source region, is electrically coupled to the third drain/source region and is located on a second level. The second contact extends in at least the second direction, overlaps the first insulating region and the first contact. The second contact is electrically insulated from the first drain/source region, is electrically coupled to the third drain/source region, and is located on a third level.

Abstract: A lighting apparatus includes a control circuit, a light source, a reset sensor and a reset circuit. The control circuit operates according to a default setting when the control circuit is started. The light source is controlled by the control circuit. The reset sensor detects a status variation. The status variation is caused by an external device outside the lighting apparatus. The reset circuit is coupled to the reset sensor for generating a reset signal to the control circuit to reset the control circuit when the status variation satisfies a predetermined triggering condition.

Abstract: An antenna module (10) includes a ground electrode (30) in which a slit (33) is formed in such a manner as to form an opening along a perimeter of the ground electrode, a first antenna (110) and a second antenna (110A) arranged in or on the ground electrode (30), and a coupling reducing electrode (200) connected to the ground electrode (30) within the slit (33). The slit (33) is formed on a path leading from the first antenna (110) to the second antenna (110A) along the perimeter of the ground electrode. The coupling reducing electrode (200) includes a first conductor (220) having a length corresponding to a first frequency and a second conductor (230) having a length corresponding to a second frequency, which is higher than the first frequency.

Abstract: A multichip package includes: a chip package comprising a first IC chip, a polymer layer in a space beyond and extending from a sidewall of the first IC chip, a through package via in the polymer layer, an interconnection scheme under the first IC chip, polymer layer and through package via, and a metal bump under the interconnection scheme and at a bottom of the chip package, wherein the first IC chip comprises memory cells for storing data therein associated with resulting values for a look-up table (LUT) and a selection circuit comprising a first input data set for a logic operation and a second input data set associated with the data stored in the memory cells, wherein the selection circuit selects, in accordance with the first input data set, data from the second input data set as an output data for the logic operation; and a second IC chip over the chip package, wherein the second IC chip couples to the first IC chip through, in sequence, the through package via and interconnection scheme, wherein the s

Abstract: A temperature monitor and control system for a pixel array includes a first driver connected to a first pixel connected to bus by a first switch, a second driver connected to a second pixel connected to a bus by a second switch, and a control block including connection to the first and second switches. The control block turns on the first switch and turns off the second switch, measures bus voltage, determines an LED forward voltage shift of the first pixel and corresponding temperature shift for the first pixel based on the determined forward voltage shift, and adjusts a driving current for first pixel based on the determined temperature shift.

Abstract: System and method for controlling one or more light emitting diodes. For example, the system includes: a power supply controller configured to receive a cathode voltage from a cathode of a diode, the diode including an anode configured to receive a rectified voltage generated by a rectifying bridge, the power supply controller being further configured to generate a first signal based at least in part on the cathode voltage; and a driver configured to receive the first signal and generate a second signal based at least in part on the first signal, the driver being further configured to output the second signal to a gate terminal of a transistor, the transistor including a source terminal coupled to the driver and a first resistor, the transistor further including a drain terminal coupled to the one or more light emitting diodes and an output capacitor connected to the cathode of the diode.

Abstract: An integrated circuit includes a first conductor segment intersecting a first active-region structure at a source/drain region and a second conductor segment intersecting a second active-region structure at a source/drain region. The first conductor segment and the second conductor segment are separated at proximal edges by a separation distance. The first conductor has a distal edge separated from a first power rail, and the second conductor segment is connected to a second power rail through a via-connector. A distance from the first power rail to a proximal edge of the first conductor segment is larger than a distance from the second power rail to a proximal edge of the second conductor segment by a predetermined distance that is a fraction of the separation distance.

Abstract: A physical unclonable function device includes alternating regions of programable material and electrically conductive regions. The regions of programable material are configured to switch resistance upon receiving an electric pulse. An electric pulse applied between two outer electrically conductive regions of the alternating regions will switch the resistance of at least one region of programmable material. The alternating regions may include a plurality of the electrically conducting regions and a region of the programable material disposed between each of the plurality of electrically conductive regions. The resistance of each of the regions of programable material is selectively variable in at least a portion thereof as a result of the electric pulse flowing therethrough. The resistance value of the programable material region may be a readable value as a state of the device. The regions of programmable material may be formed of a phase change material or an oxide.

Abstract: A programmable integrated circuit (“PIC”) device includes configurable logic blocks (“LBs”), routing connections, and configuration memory for performing user defined programmed logic functions. Each configurable LB, in one example, includes a set of lookup tables (“LUTs”) and associated registers. The LUTs, for example, are configured to generate one or more output signals in accordance with a set of input signals. The registers are arranged so that each register corresponds to one LUT. In one embodiment, a group of registers, instead of assigning to a group of LUTs across multiple configurable LBs, is allocated or configured as embedded signature registers in PSD. For example, a first register which corresponds or physically situated in the vicinity of first LUT can be designated as an embedded signature register for storing a fixed value or signature information for facilitating device or IC identification.

Abstract: A monolithic bus slave circuit structure is provided, including: a monolithic integrated chip, a rectifier bridge, a first light circuit, a second light circuit, and a third light circuit. The monolithic integrated chip includes a bus voltage input pin, a ground pin, a first drive signal output pin, a second drive signal output pin, a third drive signal output pin, and a power output pin. Both the bus voltage input pin and the ground pin are connected to an output end of the rectifier bridge, two input ends of the rectifier bridge are connected to a positive line and an negative line of a bus respectively, the ground pin is grounded. The monolithic bus slave circuit structure realizes the intelligent constant current drive function and drive the light circuits with constant current in the voltage range of the whole bus, which does not depend on the parameters of the LEDs.

Abstract: A quasi-isotropic antenna includes: a feeder; a loop antenna configured to radiate a first radio wave based on a feeding from the feeder; and a dipole antenna adjacent to the loop antenna, and configured to radiate a second radio wave by resonating based on a resonant-coupling with the loop antenna, wherein a radiation pattern of the first radio wave is orthogonal to a radiation pattern of the second radio wave.

Abstract: Systems, methods, and modes for commissioning of a building control system comprising a plurality of electronic devices installed in a building each adapted to communicate over a communication network and comprising at least one light source adapted to emit light of a plurality of colors. The system comprises at least one controller in communication with the plurality of electronic devices over the communication network, wherein the at least one controller is adapted to iteratively select one or more of the plurality of electronic devices to commission, command the selected electronic devices to emit a plurality of different assigned colors, and receive an identification of at least one illuminated color of an electronic device to be commissioned until the electronic device to be commissioned is identified.

Abstract: A method for starting up an illuminating process of a plurality of series connected LEDs by means of a LED driver is described, whereby a maximum allowed voltage output of the LED driver is lower than a forward voltage of the plurality of series connected LEDs in a cold state. The method comprises: d) providing a first current, in value lower than a desired current, by the LED driver to the plurality of series connected LEDs, resulting in a forward voltage across the plurality of series connected LEDs lower than the maximum allowed voltage output of the LED driver, e) waiting during a predetermined wait time period, f) stepping up of the first current to a second current provided by the LED driver to the plurality of series connected LEDs.

Abstract: A lighting system includes a controller having a processor and a memory. The processor is configured to receive an input indicative of a first set of lighting values corresponding to a first color space, map the first set of lighting values corresponding to the first color space to a second set of lighting values corresponding to a second color space, and output the second set of lighting values to a light emitting diode (LED) assembly.

Abstract: Asynchronous circuits implemented using threshold gate(s) and/or majority gate(s) (or minority gate(s)) are described. The new class of asynchronous circuits can operate at lower power supply levels (e.g., less than 1 V on advanced technology nodes) because stack of devices between a supply node and ground are significantly reduced compared to traditional asynchronous circuits. The asynchronous circuits here result in area reduction (e.g., 3× reduction compared to traditional asynchronous circuits) and provide higher throughput/mm2 (e.g., 2× higher throughput compared to traditional asynchronous circuits). The threshold gate(s), majority/minority gate(s) can be implemented using capacitive input circuits. The capacitors can have linear dielectric or non-linear polar material as dielectric.

Abstract: A light emitting device controls its mixed CCT by the configuration of at least one light emitter, at least one diode and at least two power distribution components. The present disclosure is mainly based on the hardware design of diode and jumper, which effectively replaces the resistors and manual switches of the conventional light emitting device with diodes, wherein the resistors and the manual switches of the conventional light emitting device cause voltage instability and other problems. The present disclosure can achieve the demand for miniaturization of the light emitting device by plugging the jumper into pins, and further can achieve the main advantages of stabilizing the voltage of the overall light emitting device, thereby stabilizing the luminous performance of the overall light emitting device, and emitting the mixed light with the required CCT. The present disclosure also illustrates a lamp assembly using the aforementioned light emitting device.

Abstract: The present disclosure provides an antenna module. The antenna module includes an antenna layer, a ground layer, and an electronic component. The ground layer is disposed over the antenna layer. The electronic component is disposed between the antenna layer and the ground layer.

Abstract: Topologies for interconnecting capacitive and inductive elements in a capacitively-coupled rib are described. An example relates to a resonant clock network (RCN) that resonates in response to both a first clock signal having a first phase and a second clock signal having a second phase. The RCN includes at least one rib coupled to at least one spine. The rib includes a first capacitive line configured to receive the first clock signal and provide, via a first capacitor, a first bias current to a first superconducting circuit. The rib further includes a second capacitive line configured to receive the second clock signal and provide, via a second capacitor, a second bias current to a second superconducting circuit. The rib further includes at least one inductive line configured to connect the first capacitive line with the second capacitive line forming a direct connection between the two capacitive lines.