Abstract: A device for automatic configuration of a semiconductor integrated circuit includes a memory that stores circuit data representing a structure of a logic circuit including a first clock gating circuit, and a processor. The processor is configured to retrieve the circuit data from the memory, determine first and second logical elements from each of which an enable signal is output to the first clock gating circuit, calculate a delay time of each of the first and second logical elements, separate the first and second logical elements on the basis of the calculated delay time, and add a second clock gating circuit for the first logical element after separating the first and second logical elements.

Abstract: There is provided herein controllable power and lighting arrangement suitable for use in commercial and/or domestic applications. There is particularly provided a method for the arrangement and automatic control of light emitting diode (LED) lights, and optionally non-LED based devices, powered by low voltage AC power distributed on bus bars. In addition there is provided a power and lighting arrangement which is especially suitable for use in a uniform and safe manner in close proximity to living organisms, particularly organisms capable of growth, such as plants, in a domestic or commercial growth system.

Abstract: Technical improvements to systems used to provide counseling regarding medical procedures and the payment therefor are discussed herein. A reduction in the amount of communications needed to provide financing for patients, when appropriate, is provided, which improves the efficiency of the systems used to process patients. Rather than transmitting sensitive data to multiple lenders to seek loan information, an internal risk assessment is developed, with the patient's consent, and used to provide pre-qualification during a cost-estimation phase of patient processing. Patients are thereby provided with greater flexibility in paying for healthcare services, which improves their access to healthcare and overall health, while providers are able to reduce regulatory and accounting burdens associated with patient delinquency.

Abstract: A driver for transmitting multi-level signals on a multi-wire bus is described that includes at least one current source connected to a transmission line, each current source selectively enabled to source current to the transmission line to drive a line voltage above a termination voltage of a termination voltage source connected to the transmission line via a termination impedance element, wherein each of the at least one current sources has an output impedance different than a characteristic impedance of the transmission line, and at least one current sink connected to the transmission line, each current sink selectively enabled to sink current from the transmission line to drive a line voltage below the termination voltage, each of the at least one current sinks having an output impedance different than the characteristic impedance of the transmission line.

Abstract: A power gating control circuit may include a transmission control circuit configured to receive a first fuse signal and output a second fuse signal based on a level of the first fuse signal in a normal mode or output a second fuse signal regardless of a level of the first fuse signal in a power down mode. The power gating control circuit may include a logic circuit block including logic gates and configured to apply the second fuse signal to the logic gates.

Abstract: Systems, methods, and apparatuses relating to a configurable spatial accelerator are described. In one embodiment, a processor includes a plurality of processing elements; and an interconnect network between the plurality of processing elements to receive an input of a dataflow graph comprising a plurality of nodes, wherein the dataflow graph is to be overlaid into the interconnect network and the plurality of processing elements with each node represented as a dataflow operator in the plurality of processing elements, and the plurality of processing elements is to perform an operation when an incoming operand set arrives at the plurality of processing elements. The processor also includes a streamer element to prefetch the incoming operand set from two or more levels of a memory system.

Abstract: A control panel or display device that includes a light source, a controller, an illuminated element, a light conductor, and a light sensor. The controller generates a control signal instructing the light source when to generate light. The light conductor conducts light generated by the light source to the illuminated element to illuminate it. The light conductor receives ambient light through the illuminated element when the light source is not generating light. The light sensor receives the ambient light from the light conductor, generates a sensor signal based on the received ambient light, and sends the sensor signal to the controller. The controller determines a brightness level based at least in part on the sensor signal and encodes the brightness level in the control signal. Brightness of the light generated by the light source is based at least in part on the brightness level encoded in the control signal.

Abstract: Methods, systems, and apparatus, including a system that includes a first integrated circuit chip configured to store application logic for one or more executable applications; and a second integrated circuit chip communicatively coupled to the first integrated circuit chip, the second integrated circuit chip including an instruction decoder configured to decode instructions for executing the one or more executable applications; and a communication interface configured to transmit the decoded instructions to the first integrated circuit chip to execute the one or more executable applications on the first integrated circuit chip.

Abstract: An AESA for SATCOM includes a PCB; a plurality of ICs; an RF feed network for an array; a plurality of patch antennas; a SPI bus for controlling phase shifting of the ICs; phase shifters being operable for selectively introducing a phase shift internal to each of the plurality of ICs such that the radiation pattern resulting from the patch antennas connected to a single IC are steered; a RF power amplifier in each of the ICs, the RF power amplifier being in a common IC footprint with at least one of the phase shifters; the RF power amplifier being structured and disposed for providing amplification for the array, wherein the RF power amplifier compensates for the lossy nature of the internal layers of the PCB; and wherein the plurality of ICs to selectively provide either left hand circular polarization, right hand circular polarization, horizontal polarization or vertical polarization.

Abstract: The present disclosure relates to an array substrate for enhancing gate driver on array (GOA) reliability. The array substrate includes dual and adjacent VSS traces in a rim. The VSS traces include a first VSS trace and a second VSS trace, and 2n number of regulation capacitors are configured between the CF_COM trace and the second VSS trace via metal material in different layers. Alternatively, a single third VSS trace is configured between the GOA circuit and the CF_COM in the active display area (AA), and 2n number of regulation capacitors are configured between the CF_COM trace and the third VSS trace via metal material in different layers. The array substrate may be adopted in the mass production of the TFT display panels.

Abstract: A lighting device is provided with input terminals that receive corresponding terminals from any one of an analog or digital dimming device or a driver configuration device. Depending on the type of connected device, different circuits are enabled by a controller to receive dimming control signals from an analog or digital dimming device, or to receive device configuration data from a multiple driver configuration device. A wireless interface circuit receives and stores configuration data via an antenna. The controller automatically detects whether one of the analog or digital dimming device or the driver configuration device is coupled to the input terminals, enables a corresponding one of the analog and digital interface circuit or the driver configuration interface circuit, and generates output current reference signals for regulating the output current from the driving circuit, said reference signals corresponding to the received dimming control signals via the analog and digital interface circuit.

Abstract: A DC-powered lighting device (100) for placement in an external fixture (102) (104), the DC-powered lighting device comprising a lighting unit (110), connector pins (112) configured to mechanically and electrically connect the DC-powered lighting device to the light fixture, a probing unit (118) connected to the connector pins and configured to determine whether electrical power is currently available via the connector pins and to provide a power-present signal indicative of the current availability of electrical power via the connector pins, a DC-power input unit (114) configured to receive DC power from a second external electrical power source, and to deliver the received DC power to the lighting unit and a switching unit (120) configured to allow the delivery of the DC power to the lighting unit in dependence on the power-present signal.

Abstract: An LED based illumination device includes a receiver and a transmitter for communications adhering to a lighting control communications protocol and a high speed communications protocol. The LED based illumination device may be part of a lighting control network, wherein the data transmission rate of the high speed communications protocol is more than twice that of the lighting control communications protocol. The lighting control network may be coupled to a digital communications gateway, including a digital communications interface configured to be coupled to a network operating in accordance with an internet protocol and a lighting control network interface coupled to the lighting control network. A processor determines a summary status value of the LED based illumination device based on information stored in memory of the digital communications gateway. The digital communications gateway may periodically transmit the time of day to the LED based illumination device over the lighting control network.

Abstract: An apparatus, system and method are disclosed to block and replace intermediate combinatorial transitions that are correlated with secret data, also referred to as glitches, with random intermediate combinatorial transitions that are uncorrelated with the data being processed.

Abstract: A power and control assembly is disclosed. An LED driver is sized and adapted to fit within a single compartment of an electrical gang box, such as a two-gang box. An alternating current (AC) dimmer or other component is installed in an adjacent compartment. The AC dimmer supplies its output to the LED driver, which converts the AC power to an appropriate direct current (DC) power for LED lighting fixtures. The LED driver is typically recessed into the compartment, and is covered by a switch or another control element. In some cases, the switch may be a mechanical dummy selected for its aesthetic or fascial characteristics. In other cases, the switch or control element may be functional. With similar multiple-gang boxes, a number of drivers may be installed in the gang box and switches may allow both dimming and zone control.

Abstract: A radiation-hardened electronic system is disclosed. The radiation-hardened electronic system includes a reconfigurable analog circuit block, a digital configuration logic circuit block, and a radiation-hardened isolation latch circuit connecting between the reconfigurable analog circuit block and the digital configuration logic circuit block. The reconfigurable analog circuit block includes multiple analog inputs and outputs. The digital configuration logic circuit block includes multiple digital inputs and outputs for controlling various functionalities of the reconfigurable analog circuit block via a set of configuration data. The radiation-hardened isolation latch circuit prevents the configuration data from entering the reconfigurable analog circuit block when the configuration data has been corrupted by a SEU.

Abstract: A strip of linear lighting with distributed power conversion is disclosed. The linear lighting includes a flexible PCB. The flexible PCB is divided into repeating blocks, which are arranged electrically in parallel with one another between power and ground. Each repeating block includes power conversion and conditioning circuits. A plurality of LED light engines are connected to the outputs of the power conversion and conditioning circuits, electrically in series with one another. The power conversion and conditioning circuits typically include at least a full-bridge rectifier, and a filter may be connected to each of the LED light engines. A pair of conductors run the length of the PCB adjacent to it and are connected to each of the repeating blocks. A flexible, transparent covering surrounds the PCB and pair of conductors.

Abstract: A receiving circuit includes first and second input sections through which signals are to be received, first and second signal lines connected to the first and second input sections, respectively, a first circuit connected to the first and second signal lines and including a termination circuit and a self-test circuit, first and second capacitive elements that are provided in the first and second signal lines and configured to allow alternating-current components of the received signals to pass therethrough and interrupt at least direct-current components of the received signals from passing through, a second circuit that is connected to the first and second signal lines and configured to boost a gain of the received signals in a certain frequency band that have passed through the first and second capacitive elements, and first and second output sections through which the received signals boosted by the second circuit are output.

Abstract: Methods and systems are described for receiving a plurality of signals in a signaling interval at a multi-input comparator (MIC), and responsively generating an analog linear combination of the received signals, amplifying the analog linear combination of the received signals using an integration stage, receiving the amplified differential voltage at two multi-phase receivers, each multi-phase receiver comprising one or more processing slices, each multi-phase receiver operating in a multi-phase processing path for processing the amplified differential voltage, wherein processing the amplified differential voltage includes generating output data decisions and phase-error information using a first multi-phase receiver of the two multi-phase receivers and selectively adjusting local speculative decision feedback equalization (DFE) slicing offsets of a second multi-phase receiver of the two multi-phase receivers according to the output data decisions generated by the first multi-phase receiver.

Abstract: Programmable shift register with programmable load location (pSRL) for data storage and method thereof is disclosed. A loadable programmable Shift Register (pSR) according to present disclosure receives a programmable input LL that defines where data D is to be loaded from the Load Register when L (Load Control Signal)=1. The loadable Shift Register with programmable load location (pSRL) is configured to obtain L (Load Control Signal), S (Shift Control Signal), LL (Load Location Control Signal), and p (programmable shift value), and wherein the pSRL is adapted to perform loading and shifting of data D based at least on the L, S, LL, and p values.