Patents Examined by Dave Goodwin
  • Patent number: 6251748
    Abstract: A method of manufacturing shallow trench isolation structure comprising the steps of forming a polysilicon mask layer over a substrate, and then patterning the polysilicon mask layer and the substrate to form a trench. Thereafter, a silicon nitride layer is formed covering the sidewalls of the trench. Next, a high-density chemical vapor deposition method is used to deposit oxide material into the trench. Finally, the surface is polished to remove a portion of the oxide layer and the silicon nitride layer until the polysilicon mask layer is exposed. The shallow trench isolation structure can avoid subthreshold kink effect and reduce subthreshold leakage current.
    Type: Grant
    Filed: October 1, 1998
    Date of Patent: June 26, 2001
    Assignee: United Microelectronics Corp.
    Inventor: Meng-Jin Tsai
  • Patent number: 6242277
    Abstract: A planarized layer is formed on the substrate, and an opening is formed. A microlens resist layer is formed over the planarized layer, wherein the microlens resist layer has a bigger thickness in the opening than on the planarized layer. A first photoresist layer is formed on the microlens layer. The first photoresist layer has a pattern align to the color filter. A first exposure step is performed at least onto the microlens layer to form a first exposed portion, using the first photoresist layer as a mask, and the first photoresist layer is removed. A second photoresist layer is performed on the microlens resist layer. The second photoresist layer has a pattern align to the opening. A second exposure step is performed at least onto the microlens layer to form a second exposed portion, using the second photoresist layer as a mask, and the second photoresist layer is removed.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: June 5, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Wei-Chang Lin, Yuan-Chi Pai