Patents Examined by David A Cathey, Jr.
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Patent number: 8828259Abstract: A method for automatically performing power matching using a mechanical RF match during substrate processing is provided. The method includes providing a plurality of parameters for the substrate processing wherein the plurality of parameters including at least a predefined number of learning cycles. The method also includes setting the mechanical RF match to operate in a mechanical tuning mode. The method further includes providing a first set of instructions to the substrate processing to ignore a predefined number of cycles of Rapid Alternating Process RAP steps. The method yet also includes operating the mechanical RF match in the mechanical tuning mode for the predefined number of learning cycles. The method yet further includes determining a set of optimal capacitor values. The method moreover includes providing a second set of instructions to a power generator to operate in a frequency tuning mode.Type: GrantFiled: July 7, 2011Date of Patent: September 9, 2014Assignee: Lam Research CorporationInventor: Arthur H. Sato
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Patent number: 8815106Abstract: A method of supplying an etching gas includes: supplying a first etching gas used in an etching process into a processing container; and supplying a second etching gas used in the etching process into the processing container, in which, when the first etching gas and the second etching gas are switched therebetween, only a small amount of a gas, which is needed as an etching gas before the switching and is not needed as an etching gas after the switching, is continuously supplied into the processing container.Type: GrantFiled: August 10, 2011Date of Patent: August 26, 2014Assignee: Tokyo Electron LimitedInventors: Masahiro Ogasawara, Yoshiyuki Kato, Hideki Mizuno, Yoshinobu Hayakawa
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Patent number: 8815110Abstract: The invention provides a polishing composition comprising (a) silica, (b) one or more compounds that increase the removal rate of silicon, (c) one or more tetraalkylammonium salts, and (d) water, wherein the polishing composition has a pH of about 7 to about 11. The invention further provides a method of polishing a substrate with the polishing composition.Type: GrantFiled: April 16, 2010Date of Patent: August 26, 2014Assignee: Cabot Microelectronics CorporationInventors: Brian Reiss, Michael White, Lamon Jones, John Clark
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Patent number: 8808558Abstract: The invention provides a system and method for alignment of nanoparticles on a substrate. The system includes: a substrate; a plurality of polypeptide templates formed on the substrate; and a plurality of nanoparticles formed on the polypeptide templates. The method includes: providing a substrate; forming a plurality of polypeptide templates on the substrate; and forming a plurality of nanoparticles on the polypeptide templates.Type: GrantFiled: January 31, 2011Date of Patent: August 19, 2014Assignee: National Sun Yat-Sen UniversityInventor: Shu-Chen Hsieh
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Patent number: 8784674Abstract: A perpendicular magnetic recording (PMR) head is fabricated with a pole tip shielded laterally by a graded side shield that is conformal to the shape of the pole tip at an upper portion of the shield but not conformal to the pole tip at a lower portion. The shield includes a trailing shield, that is conformal to the trailing edge of the pole tip and may include a leading edge shield that magnetically connects two bottom ends of the graded side shield.Type: GrantFiled: December 6, 2013Date of Patent: July 22, 2014Assignee: Headway Technologies, Inc.Inventors: Yan Wu, Zhigang Bai, Moris Dovek, Cherng-Chyi Han, Min Li, Jianing Zhou, Jiun-Ting Lee, Min Zheng
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Patent number: 8764998Abstract: A method for manufacturing a composite substrate that prevents undesirable effects of etching a thin film includes a pattern forming step, an ion implanting step, a bonding step, and a separation step. In the pattern forming step, a pattern region and a reverse pattern region are formed on a principal surface of a functional material substrate. In the ion implanting step, by implanting ions into the functional material substrate, a separation layer is formed inside at a certain distance from the surface of each of the pattern region and the reverse pattern region. In the bonding step, the functional material substrate at the pattern region is bonded to a supporting substrate. In the separation step, the pattern region is separated from the functional material substrate, and the reverse pattern region is made to fall off.Type: GrantFiled: July 28, 2011Date of Patent: July 1, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Kiyoto Araki, Takashi Iwamoto, Hajime Kando
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Patent number: 8747684Abstract: A method and apparatus for plasma etching a workpiece, such as a semiconductor wafer, including a thin film stack having a top film disposed over a bottom film with an intervening middle film there between. Etch selectivity between the top and bottom films may be as low as between 1:1 and 2:1 and a first carbon-lean gas chemistry is used to etch through the top film, a second carbon-lean gas chemistry is used to etch through the middle film, and the bottom film is etched through by alternating between depositing a polymer passivation on the top film using a carbon-rich gas chemistry and an etching of the bottom film with a third carbon-lean gas chemistry, which may be the same as the first carbon-lean gas chemistry.Type: GrantFiled: August 20, 2010Date of Patent: June 10, 2014Assignee: Applied Materials, Inc.Inventors: Sunil Srinivasan, Jinhan Choi, Anisul H. Khan
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Patent number: 8741778Abstract: A method of etching silicon oxide from a multiple trenches is described which allows more homogeneous etch rates among trenches. The surfaces of the etched silicon oxide within the trench following the etch may also be smoother. The method includes two dry etch stages followed by a sublimation step. The first dry etch stage removes silicon oxide quickly and produces large solid residue granules. The second dry etch stage remove silicon oxide slowly and produces small solid residue granules in amongst the large solid residue granules. Both the small and large solid residue are removed in the ensuing sublimation step. There is no sublimation step between the two dry etch stages.Type: GrantFiled: August 3, 2011Date of Patent: June 3, 2014Assignee: Applied Materials, Inc.Inventors: Dongqing Yang, Jing Tang, Nitin Ingle
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Patent number: 8702997Abstract: A method of balancing a microelectromechanical system comprises determining if a microelectromechanical system is balanced in a plurality of orthogonal dimensions, and if the microelectromechanical system is not balanced, selectively depositing a first volume of jettable material on a portion of the microelectromechanical system to balance the microelectromechanical system in the plurality of orthogonal dimensions. A jettable material for balancing a microelectromechanical system comprises a vehicle, and a dispersion of nano-particles within the vehicle, in which the total mass of jettable material deposited on the microelectromechanical system is equal to the weight percentage of nano-particles dispersed within the vehicle multiplied by the mass of jettable material deposited on the microelectromechanical system.Type: GrantFiled: June 2, 2011Date of Patent: April 22, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: Pavel Kornilovich, Vladek Kasperchik, James William Stasiak
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Patent number: 8697576Abstract: The invention provides a polishing composition comprising silica, an aminophosphonic acid, a polysaccharide, a tetraalkylammonium salt, a bicarbonate salt, an azole ring, and water, wherein the polishing composition has a pH of about 7 to about 11. The invention further provides a method of polishing a substrate with the polishing composition.Type: GrantFiled: December 17, 2010Date of Patent: April 15, 2014Assignee: Cabot Microelectronics CorporationInventors: Brian Reiss, Timothy Johns, Michael White, Lamon Jones, John Clark
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Patent number: 8691696Abstract: Methods are provided for forming an integrated circuit. In an embodiment, the method includes forming a sacrificial mandrel overlying a base substrate. Sidewall spacers are formed adjacent sidewalls of the sacrificial mandrel. The sidewall spacers have a lower portion that is proximal to the base substrate, and the lower portion has a substantially perpendicular outer surface relative to the base substrate. The sidewall spacers also have an upper portion that is spaced from the base substrate. The upper portion has a sloped outer surface. A first dielectric layer is formed overlying the base substrate and is conformal to at least a portion of the upper portion of the sidewall spacers. The upper portion of the sidewall spacers is removed after forming the first dielectric layer to form a recess having a re-entrant profile in the first dielectric layer. The re-entrant profile of the recess is straightened.Type: GrantFiled: May 21, 2012Date of Patent: April 8, 2014Assignee: GLOBALFOUNDRIES, Inc.Inventors: Xiuyu Cai, Xunyuan Zhang, Ruilong Xie, Errol T. Ryan, John Iacoponi
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Patent number: 8691102Abstract: A method of manufacturing a plasmon generator includes the steps of: forming an etching mask on a dielectric layer; forming an accommodation part by etching the dielectric layer using the etching mask; and forming the plasmon generator to be accommodated in the accommodation part. The step of forming the etching mask includes the steps of: forming a patterned layer on an etching mask material layer, the patterned layer having a first opening that has a sidewall; forming a structure by forming an adhesion film on the sidewall, the structure having a second opening smaller than the first opening; and etching a portion of the etching mask material layer exposed from the second opening.Type: GrantFiled: December 31, 2012Date of Patent: April 8, 2014Assignee: Headway Technologies, Inc.Inventors: Hironori Araki, Yoshitaka Sasaki, Hiroyuki Ito, Yukinori Ikegawa, Seiichiro Tomita, Shigeki Tanemura
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Patent number: 8679354Abstract: A controlled method of releasing a microstructure comprising a silicon oxide layer located between a substrate layer and a layer to be released from the silicon oxide layer is described. The method comprises the step of exposing the silicon oxide layer to a hydrogen fluoride vapor in a process chamber having controlled temperature and pressure conditions. A by-product of this reaction is water which also acts as a catalyst for the etching process. It is controlled employment of this inherent water source that results in a condensed fluid layer forming, and hence etching taking place, only on the exposed surfaces of the oxide layer. The described method therefore reduces the risk of the effects of capillary induced stiction within the etched microstructure and/or corrosion within the microstructure and the process chamber itself.Type: GrantFiled: August 2, 2007Date of Patent: March 25, 2014Assignee: Memsstar LimitedInventor: Anthony O'Hara
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Patent number: 8652339Abstract: A method for patterned deposition of an arbitrary thin film on an arbitrary substrate. A GaAs substrate having a bi-layer structure deposited thereon, the bi-layer structure consisting of a bottom layer of Ge and a top layer of SiN. A photoresist deposited on the top SiN surface of the sample is patterned to form one or more desired patterned features on the sample. The Ge—SiN bi-layer structure on the patterned sample is aniostropically etched so that an undercut is formed in the Ge layer, the SiN forming an overhang over a portion of the GaAs substrate. The remaining photoresist is removed from the sample and the film is deposited on the sample to form a feature on the substrate. The remaining Ge layer is etched away and the SiN layer and film deposited on the SiN layer are lifted from the sample, leaving only the patterned features on the substrate.Type: GrantFiled: January 22, 2013Date of Patent: February 18, 2014Assignee: The United States of America, as represented by the Secretary of the NavyInventors: David J. Meyer, Neil P. Green, David A. Deen, Steven C. Binari
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Patent number: 8641915Abstract: Example embodiments are directed to an electronic device and a method for manufacturing the same. The electronic device includes a polymer thin film and an electrode. The polymer thin film includes nanoparticles. The electrode is formed by attaching a graphene thin film of a sheet shape formed through graphene deposition using a vapor carbon supply source to the polymer thin film. In the method, a graphene thin film of a sheet shape is formed through graphene deposition using a vapor carbon supply source. A polymer solution with distributed nanoparticles is prepared. The polymer solution with distributed nanoparticles is spin-coated on a substrate. A polymer thin film comprising the nanoparticles is formed by drying the spin-coated polymer solution. An electrode is formed by attaching the graphene thin film onto the polymer thin film.Type: GrantFiled: August 20, 2010Date of Patent: February 4, 2014Assignees: Samsung Electronics Co., Ltd., Industry-University Cooperation Foundation Hanyang UniversityInventors: Tae-Whan Kim, Won-il Park, Dong-Ick Son, Hee-Yeon Yang, Jung-Min Lee, Jae-Hun Jung
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Patent number: 8641920Abstract: A polishing composition of the present invention at least comprises about 750 ppm to less than 5000 ppm by weight of abrasive particles, hydrogen peroxide, an accelerator, a dual-corrosion inhibitor and water, wherein the dual-corrosion inhibitor contains a first and a second corrosion inhibitor. The dual-corrosion inhibitor is applied to the planarization of metal layers so as to maintain a high removal rate of metal layers as well as suppress etching of the metal, thus capable of reducing polishing defects such as dishing, erosion and the like.Type: GrantFiled: June 11, 2009Date of Patent: February 4, 2014Assignee: UWiZ Technology Co., Ltd.Inventors: Song-Yuan Chang, Ming-Che Ho, Ming-hui Lu
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Patent number: 8623767Abstract: The invention provides compositions and methods for planarizing or polishing a substrate. The composition comprises an abrasive consisting of alumina particles optionally treated with a polymer, an ?-hydroxycarboxylic acid, an oxidizing agent that oxidizes at least one metal, polyacrylic acid, optionally, a calcium-containing compound, optionally, a biocide, optionally, a pH adjusting agent, and water. The method uses the composition to chemically-mechanically polish a substrate.Type: GrantFiled: March 18, 2013Date of Patent: January 7, 2014Assignee: Cabot Microelectronics CorporationInventors: Vlasta Brusic, Christopher Thompson, Jeffrey Dysard
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Patent number: 8617999Abstract: A method of manufacturing a semiconductor device, which forms a pattern by performing pattern transformation steps multiple times, comprises setting finished pattern sizes for patterns to be formed in each consecutive two pattern transformation steps among the plurality of pattern transformation steps based on a possible total amount of in-plane size variation of the patterns to be formed in the consecutive two pattern transformation steps.Type: GrantFiled: February 16, 2012Date of Patent: December 31, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Hiromitsu Mashita, Toshiya Kotani, Fumiharu Nakajima, Takafumi Taguchi, Chikaaki Kodama
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Patent number: 8597529Abstract: A method for processing a substrate includes preparing a substrate having a first layer on a first surface side thereof, the first layer having a material capable of suppressing transmission of laser light, processing the substrate with laser light from a second surface that is opposite the first surface of the substrate toward the first surface of the substrate, and allowing the laser light to reach the first layer to form a hole in the substrate, and performing etching of the substrate from the second surface through the hole.Type: GrantFiled: June 15, 2009Date of Patent: December 3, 2013Assignee: Canon Kabushiki KaishaInventors: Keisuke Kishimoto, Satoshi Ibe, Takuya Hatsui, Shimpei Otaka, Hiroto Komiyama, Hiroyuki Morimoto, Masahiko Kubota, Toshiyasu Sakai
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Patent number: 8597528Abstract: A method and system for fabricating a magnetic transducer is described. A magnetic junction is defined from the magnetoresistive stack. The magnetic junction has a top and a plurality of sides. The step of defining the magnetic junction redeposits a portion of the magnetoresistive stack and forms fencing adjacent to the top of the magnetic junction. At least one hard bias structure is provided after the magnetic junction is defined. A first portion of the at least one hard bias structure is substantially adjacent to the magnetoresistive junction in a track-width direction. The magnetic junction is ion beam planarized, thereby substantially removing the fencing.Type: GrantFiled: March 30, 2011Date of Patent: December 3, 2013Assignee: Western Digital (Fremont), LLCInventors: Anup G. Roy, Ming Mao