Abstract: A system, apparatus and method for modifying the machine code of an existing computer program to use a hybrid base-ten number system and corresponding hybrid arithmetic that replaces and processes all decimal numbers of any length. The hybrid base-ten arithmetic expands the numerical range of decimal numbers by expressing computed results in the hybrid base-ten number system. In some embodiments, the corresponding hybrid arithmetic rules recognize some number combinations as non-numerical special codes.

Abstract: A low-overhead performance measurement of an application executing in a data processing system is provided in order to generate per-thread performance information in a multithreaded environment. While a first set of events is being monitored for a particular thread as a first metric, events that may indirectly cause inaccuracies in the first metric, such as thread switches, are also monitored as a second metric. The presence of a positive value for the second metric is then used to determine that the first metric is inaccurate or unreliable, after which the first metric may be discarded; otherwise, the first metric is considered accurate. For example, the first metric may then be considered a thread-relative metric as it has been observed during a time period in which no thread switch events or interrupt events would have caused the first metric to become inaccurate during the execution of a particular thread.

Abstract: In a computer having rotating registers, a schedule-assigner for allocating the rotating registers. The scheduler-assigner includes a software-pipelined instruction scheduler that generates a first software-pipelined instruction schedule based on an intermediate representation that has data flow information in SSA form. The scheduler-assigner also includes a rotating register allocator that designates live ranges of loop-variant variables in the first software-pipelined instruction schedule as being allocated to rotating registers, when available. The first software-pipelined instruction schedule may be a modulo schedule. When a rotating register is not available, the software-pipelined instruction scheduler may generate a second software-pipelined instruction schedule having an initiation interval greater than the initiation interval of the first software-pipelined instruction schedule.

Abstract: A mechanism for maintaining reuse invalidation information includes a reuse buffer and a reuse invalidation buffer. The reuse buffer stores multiple instances of the reuse region. Each instance stored in the reuse buffer is identified by one or more versions. The reuse invalidation buffer contains multiple entries. Each entry in the reuse invalidation buffer includes one or more pairs of pointers pointing to instances and versions of instances held in the reuse buffer.

Abstract: The present invention provides a mechanism for implementing compare speculation in software pipelined loops. A data dependency graph (DDG) is generated for a loop that includes a control compare instruction, a compare instruction and a non-speculative instruction that depends directly or indirectly on the compare instruction. A loop-carried edge between the control compare instruction and the compare instruction is replaced by a loop-carried edge between the control compare instruction and the non-speculative instruction. If the compare instruction is speculated when the loop is modulo-scheduled, any load instruction that depends on the compare is converted to a speculative load, and a loop-carried edge is added between the control compare and a check instruction associated with the speculative load. A loop-independent edge is also added between the check instruction and the non-speculative instruction if the non-speculative instruction also depends on the load.

Abstract: A method and apparatus for generating an optimized intermediate representation of source code for a computer program are described. An initial intermediate representation is extracted from the source code by organizing it as a plurality of basic blocks that each contain at least one program instruction ordered according to respective estimated profit values. A goal function that measures the degree of optimization of the program is calculated in accordance with its intermediate representation. The effect on the goal function of modifying the intermediate representation by moving an instruction from one of the basic blocks to each of its predecessors is tested iteratively and adopting the modified intermediate representation if it causes a reduction in the goal function.

Abstract: Dynamically generating expanded user messages, in a computer system having a logging tool for creating a log file. The log file comprises log messages produced in response to events occurring during execution of an application program. Firstly, the application program source code is pre-analysed to extract a plurality of program components, including comments. The different component types and comments associated with them are ordered into tabular form. An individual log message is read from the log file and its program components are determined. Comments associated with these program components are read from the relationship tables. The comments are used to supplement the original log message by combining them to produce expanded user messages in a user-friendly format. These expanded user messages may be further grammatically parsed into natural language, in order to provide the end user with more meaningful diagnostic information.