Patents Examined by David A. Zarncke
  • Patent number: 6980017
    Abstract: An interconnect for testing semiconductor components includes a substrate, and contacts on the substrate for making temporary electrical connections with bumped contacts on the components. Each contact includes a recess and a pattern of leads cantilevered over the recess configured to electrically engage a bumped contact. The leads are adapted to move in a z-direction within the recess to accommodate variations in the height and planarity of the bumped contacts. In addition, the leads can include projections for penetrating the bumped contacts, a non-bonding outer layer for preventing bonding to the bumped contacts, and a curved shape which matches a topography of the bumped contacts. The leads can be formed by forming a patterned metal layer on the substrate, by attaching a polymer substrate with the leads thereon to the substrate, or be etching the substrate to form conductive beams.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: December 27, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Salman Akram
  • Patent number: 6734374
    Abstract: A method for soldering braiding layers of wires of a micro-coaxial cable to a substrate, wherein each wire includes a core conductor, an inner insulator, a braiding layer, and an outer insulator, comprises the steps of: exposing the braiding layers of the wires; providing a substrate having a thick layer of fusible element thereon; and arranging the braiding layers to the thick layer of the substrate while providing enough energy such that molten fusible element is substantially filled in interstitial space between the braiding layers of adjacent individual wires. An electrical cable assembly made by the above method is also disclosed.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: May 11, 2004
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventor: Chiu Yu Tang