Abstract: A single wire data bus is utilized by a bus master to communicate with and identify electronic devices also connected to the single wire data bus. Each of the electronic devices include a unique ID (identification), wherein the bus master, using a one-wire protocol, can identify all of the electronic devices connected to the single wire data bus.

Abstract: An apparatus and method for efficiently generating the consecutive addresses needed to access misaligned or doubleword length data stored in the memory of a general purpose microprocessor. The apparatus shares the address generation operations between a small 3 bit adder, typically contained in the bus unit, and the execution unit. Control logic is used to determine whether a data misalignment situation exists based on the length of the data which is to be retrieved and the starting address of the data. When misalignment is indicated, the control unit acts to assign the address calculations to either the 3 bit adder alone or the execution unit together with the 3 bit adder depending upon how much the present address must be incremented to obtain the new addresses.

Abstract: A portable electronic smart card for use as a medium for the dissemination among consumers of digitized data such as texts, pictures or game programs. The smart card is connected to user systems through a reduced set of contacts including, regardless of capacity, 3 contacts for transmitting address signals (CA1, CA2, INC/DEC), 8 contacts for transmitting data signals (D0-D7), and 5 different leading and control signals (VCC, VPP, GND, PGM, OE). For memory addressing, the card contains two up-down counter (11 and 12) which receive pulses from lines CA1, CA2 and INC/DEC.