Abstract: A system for inserting a supplemental micro-operation sequence into a macroinstruction-generated micro-operation flow provides a versatile, flexible mechanism for early pipeline stages of a microprocessor to pass control signals, data, and other information to later pipeline stages. The mechanism is useful to maintain precise timing of a fault model in pipelined processors. A method includes the step of detecting the occurrence of a predetermined uop-inserting event and, responsive thereto, generating a control signal to a uop insertion unit. Responsive thereto, the uop insertion unit supplies signals to a decoder which, responsive thereto, decodes the signal encoded within the signal to provide the inserted uop sequence, which is inserted in a position within the macroinstruction-generated micro-operation flow predetermined by the uop-inserting event.

Abstract: A data communications system (100) has a controller (214) for managing the system containing a plurality of data communications devices (224). The data communication devices (224) have memory allocated for storing controller configuration information in order to serve as distributed controller backup units (226). If the controller (214) is replaced by a replacement controller (228), the controller configuration information is restored to the replacement controller (228) which receives the controller configuration information previously stored in the memory of the data communication devices serving as distributed controller backup units. The controller configuration information is stored in a page format (390) having identification (391), controller configuration information data (392), and error detection information (393).