Patents Examined by David Ransom
  • Patent number: 6119206
    Abstract: Stack tracebacks are performed in debugging and exception handling routines, and involve providing the values of non-volatile registers at the time of entry into each function in a call chain. One stack traceback technique includes performing the following two steps for each virtual address at which a function call in the call chain is made: (1) locating the tag section whose virtual address range includes the virtual address; and (2) locating a tag in the tag section found in step (1), whose virtual address range includes the virtual address. The tag found in step (2) indicates which of the values, if any, respectively held by the non-volatile registers upon entry to the particular function in which the above function call is made, are stored in a stack frame for the particular function at the time of the function call.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: September 12, 2000
    Assignee: Sun Microsystems, Inc.
    Inventors: Vijay K. Tatkar, Bruce A. Delagi, Terrence C. Miller, Joel Steven Zucker
  • Patent number: 6119212
    Abstract: A method for decreasing the size of a root partition on a computer system operating under control of a UNIX type operating system without reinstalling the operating system. The computer system includes a first storage device. The first storage device includes the root partition which has a first size. The root partition includes a root file system. The method includes backing up the root file system to a backup file system, booting the computer system to a maintenance mode, deactivating the root partition, activating the root partition at a second size smaller than the first size, and restoring the root file system from the backup file system.
    Type: Grant
    Filed: April 23, 1997
    Date of Patent: September 12, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Danny Brice Gross, Michael Douglas O'Donnell, Gene Regis Toomey
  • Patent number: 6078991
    Abstract: A method and system for speculatively sourcing cache memory data within a multiprocessor data-processing system is disclosed. In accordance with the method and system of the present invention, the data-processing system has multiple processing units, each of the processing units including at least one cache memory. In response to a request for data by a first processing unit within the data-processing system, an intervention response is issued from a second processing unit within the data-processing system that contains the requested data. A system bus is then requested for sourcing the requested data from a cache memory within the second processing unit before a combined response from all the processing units returns to the second processing unit.
    Type: Grant
    Filed: April 14, 1997
    Date of Patent: June 20, 2000
    Assignee: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis
  • Patent number: 6026471
    Abstract: According to the present invention, an anticipating cache memory loader is provided to "pre-load" the cache with the data and instructions most likely to be needed by the CPU once the currently executing task is completed or interrupted. The data and instructions most likely to be needed after the currently executing task is completed or executed is the same data and instructions that were loaded into the cache at the time the next scheduled task was last preempted or interrupted. By creating and storing an index to the contents of the cache for various tasks at the point in time the tasks are interrupted, the data and instructions previously swapped out of the cache can be retrieved from main memory and restored to the cache when needed. By using available bandwidth to pre-load the cache for the next scheduled task, the CPU can begin processing the next scheduled task more quickly and efficiently than if the present invention were not utilized.
    Type: Grant
    Filed: November 19, 1996
    Date of Patent: February 15, 2000
    Assignee: International Business Machines Corporation
    Inventors: Kenneth Joseph Goodnow, Clarence Rosser Ogilvie, Wilbur David Pricer, Sebastian Theodore Ventrone
  • Patent number: 5991860
    Abstract: A method for increasing the size of a root file system on a computer system operating under control of a UNIX type operating system. The computer system includes a first storage device. The first storage device includes a root partition. The root partition includes a root file system. The method includes booting the computer system to a single user mode, increasing the size of the root partition and the root file system without reinstalling the UNIX type operating system, and rebooting the computer system.
    Type: Grant
    Filed: April 23, 1997
    Date of Patent: November 23, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Danny Brice Gross, Michael Douglas O'Donnell, Gene Regis Toomey
  • Patent number: 5933852
    Abstract: A computer system includes a memory requester that interfaces with a memory module that includes memory portions. A remapping table that maps each of the defective memory portions to a respective non-defective memory portion in the memory module is created and then stored. Also, a usage table that maps each of a subset of the defective memory portions to a respective non-defective memory portion is created and stored. The defective memory portions of the subset are selected based on which defective memory portions have been most recently used, i.e., requested. In response to receiving from the memory requester a request for access to a requested memory portion of the memory module, a determination is made whether the requested memory portion is one of the defective memory portions mapped in the usage table or remapping table.
    Type: Grant
    Filed: November 7, 1996
    Date of Patent: August 3, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Joseph Jeddeloh
  • Patent number: 5930827
    Abstract: A method and apparatus for dynamically allocating system memory using a binary tree organized in an address and size dependent manner. Within the prior art, dynamic memory allocation methods were not portable to virtual memory addressing systems wherein local memory and system memory were joined in a continuous region of linear addresses. The allocation method of the present invention utilizes a binary tree of free memory block headers, corresponding to free memory blocks. Each free memory block header has an address field and a translation table field. The address field corresponds to a virtual address of the free memory block. The translation table field points to an entry within a translation table that is used to map the virtual address to a block in system memory.
    Type: Grant
    Filed: December 2, 1996
    Date of Patent: July 27, 1999
    Assignee: Intel Corporation
    Inventor: Jay J. Sturges