Patents Examined by David Robertson
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Patent number: 7275248Abstract: According to one embodiment of the invention, a task management section of an operating system is notified of temperature abnormality by the notification that the rotation rate of the cooling fan reaches a specified rate, it executes measures to reduce the load of the processor: for example, (1) discriminating a program that does not require real-time execution, with reference to the task management table and forcibly stopping the program; (2) discriminating a program that requires real-time execution and that is in operation in a normal status, with reference to the task management table, and simplifying or omitting a process of the program; and (3) discriminating a program of a low priority of real-time execution from the programs that require real-time execution, with reference to the task management table, and forcibly stopping the program.Type: GrantFiled: March 24, 2005Date of Patent: September 25, 2007Assignee: Kabushiki Kaisha ToshibaInventor: Yoshihiro Nishida
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Patent number: 7237070Abstract: At a first cache memory affiliated with a first processor core, an exclusive memory access operation is received via an interconnect fabric coupling the first cache memory to second and third cache memories respectively affiliated with second and third processor cores. The exclusive memory access operation specifies a target address. In response to receipt of the exclusive memory access operation, the first cache memory detects presence or absence of a source indication indicating that the exclusive memory access operation originated from the second cache memory to which the first cache memory is coupled by a private communication network to which the third cache memory is not coupled. In response to detecting presence of the source indication, a coherency state field of the first cache memory that is associated with the target address is updated to a first data-invalid state.Type: GrantFiled: April 19, 2005Date of Patent: June 26, 2007Assignee: International Business Machines CorporationInventors: Guy L. Guthrie, Aaron C. Sawdey, William J. Starke, Derek Edward Williams
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Patent number: 7149428Abstract: The present invention provides a method and an apparatus for monitoring optical signal to noise ratio (OSNR) in a wavelength division multiplexing optical transmission system. The present invention utilizes a polarization nulling method and a tunable optical bandpass filter in order to reliably monitor the OSNR by considering a finite polarization nulling ratio, polarization mode dispersion and non-linear birefringence of the optical system in real time measurement of the OSNR. Further, the tunable optical bandpass filter is controlled to filter all wavelength bands of wavelength division multiplexed signals. Since the invention may monitor a plurality of demultiplexed optical signals with a single apparatus, the overall cost of the OSNR monitoring equipment is significantly reduced.Type: GrantFiled: May 20, 2003Date of Patent: December 12, 2006Assignee: Teralink Communications, Inc.Inventors: Yun Chur Chung, Seung Kyun Shin, Chul Han Kim
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Patent number: 6460113Abstract: A system and method for shared storage in a computer networking environment are provided. The system includes a fabric and a server coupled to the fabric. The server is operable to be coupled to a computer network and receive data from the network. The system further includes a physical storage device coupled to the fabric. The physical storage device is operable to store data received from the network. The system further includes a bridge coupled to the fabric and a dedicated backup storage device coupled to the bridge. The dedicated backup storage device is operable to store data received from the physical storage device.Type: GrantFiled: January 25, 2000Date of Patent: October 1, 2002Assignee: Dell Products L.P.Inventors: Karl D. Schubert, Stephen G. Luning
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Patent number: 6249843Abstract: A STORE instruction having horizontal memory hierarchy control bits is disclosed. The STORE instruction comprises an operation code field, a write-through field, and a horizontal write-through level field. The horizontal write-through level field indicates a horizontal memory level within a multi-level memory hierarchy to which the STORE operation should be applied, when the write-through field is set.Type: GrantFiled: August 5, 1999Date of Patent: June 19, 2001Assignee: International Business Machines CorporationInventors: Ravi Kumar Arimilli, John Steve Dodson, Guy Lynn Guthrie
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Patent number: 6088760Abstract: A multi-port memory chip having a DRAM main memory and a SRAM cache memory coupled via a global bus. An addressing system enables the user to perform data transfers between external data ports and the SRAM concurrently with data transfers between the DRAM and the SRAM. To support DRAM operations, DRAM address pins on the memory chip select a data block in the DRAM, and indicates a SRAM line for receiving or transferring data. To support SRAM operations, SRAM address pins determine addressed line and word in the SRAM. To reduce the number of pins on the memory chip the DRAM address pins and SRAM address pins are used for supplying commands that define various memory operations.Type: GrantFiled: February 4, 1998Date of Patent: July 11, 2000Assignee: Mitsubishi Semiconductor America, Inc.Inventors: Robert M. Walker, Stephen Camacho, Rhonda Cassada
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Patent number: 6061090Abstract: A reproducing apparatus for detecting and storing information about the presence or absence of information in each recording track of a recording medium. A scanning head is first moved to the recording track which is in a position opposite the the recording track in which the reproduction will be initiated. Then the scanning head successively processes each recording track to determine the presence or absence of information. Upon termination of the processing of each recording track, the scanning head is located at the recording track in which the reproduction will be initiated. Display is made of the number of consecutive blank tracks.Type: GrantFiled: December 27, 1994Date of Patent: May 9, 2000Assignee: Canon Kabushiki KaishaInventor: Shigeo Yamagata
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Patent number: 5187618Abstract: A method for automatically controlling the next function of a video cassette recorder or audio cassette tape recorder by a microcomputer is disclosed. The method for automatically performing the next mode comprises checking for selection of a next mode key designating a function to be performed upon completion of the presently operating function; checking whether the selected function is an allowable function; recording in the memory of the selected next function; checking whether the presently operating function is completed; and performing a stored next function recorded in the memory when said present operation is completed.Type: GrantFiled: June 20, 1990Date of Patent: February 16, 1993Assignee: SamSung Electronics Co., Ltd.Inventor: Kwon-pyo Hong