Patents Examined by David S. Martin
  • Patent number: 6510058
    Abstract: Isolated planar conductive structures on separated layers of a PCB provide the normally-open, common, and normally-closed components of an electromechanical relay circuit to minimize inductive area. The isolated planar configuration reduces coupling of relay contact-noise currents to nearby sensitive circuits, and minimizes coupling EMI energy from nearby logic or microprocessor circuits to the relay contact circuits.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: January 21, 2003
    Assignee: Sensormatic Electronics Corporation
    Inventor: Raymond Kozakiewicz
  • Patent number: 6498731
    Abstract: A protective assembly for electronic components. The protective assembly has a base and a first printed circuit board secured to the base. An electronic component is disposed on the printed circuit board and protected by a rigid member that is also secured to the base. The protective assembly is designed to be mechanically and electrically coupleable to a computer-based system.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: December 24, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Brett D. Roscoe, George D. Megason, Christian H. Post
  • Patent number: 6483714
    Abstract: A multilayered wiring board comprising a first stacked structure consisting essentially of a first insulating layer having a first parallel conductor array and a second insulating layer formed thereon, having a second parallel conductor array oriented orthogonal to the first parallel conductor array, the first and second parallel conductor arrays being electrically interconnected by a first through conductor array; and a second stacked structure consisting essentially of a third insulating layer having a third parallel conductor array crossing at an angle of 30 to 60 degrees to the first parallel conductor array and a fourth insulating layer formed on top of the third insulating layer, having a fourth parallel conductor array orthogonal to the third parallel conductor array, the third and fourth parallel conductor arrays being electrically interconnected by a second through conductor array, wherein the second stacked structure is overlaid on the first stacked structure by interposing therebetween an intermedi
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: November 19, 2002
    Assignee: Kyocera Corporation
    Inventors: Masanao Kabumoto, Yoshihiro Nabe, Masaru Nomoto, Shigeto Takeda
  • Patent number: 6477117
    Abstract: A wearable mobile computing device/appliance (a wrist watch) with a high resolution display that is capable of wirelessly accessing information from a network and a variety of other devices. The mobile computing device/appliance includes a user interface that is used to efficiently interact with alarms and notifications on the watch.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: November 5, 2002
    Assignee: International Business Machines Corporation
    Inventors: Chandrasekhar Narayanaswami, Mandayam T. Raghunath
  • Patent number: 6469906
    Abstract: An adapter for adapting a first circuit package to a second circuit packaging, includes a substrate for receiving the first circuit package thereon, a plurality of connectors disposed on the substrate configured in the form of the second circuit packaging, and interconnections on the substrate for interconnecting the first circuit package to the plurality of connectors. At least one electronic component may also be disposed on the substrate and interconnected with the first transceiver package and the second transceiver packaging. An insulator pad may be provided for electrically insulating the adapter circuitry from an electrical system circuit board on which the adapter is mounted. A metal cover provides a chassis ground.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: October 22, 2002
    Assignee: International Business Machines Corporation
    Inventors: Jeremy J. Baltz, Michael Francis Hanley, Darwin Lee Koerber
  • Patent number: 6462961
    Abstract: Presented is a component housing assembly having universal mounting capability provided by a universal mounting bracket and a housing having a plurality of mounting holes to accommodate the attachment of the bracket in multiple configurations. Specifically, the component housing is sized to fit within a standard 19-inch rack-mount cabinet. The universal mounting bracket includes a first and a second portion in a perpendicular relationship, each having a length suitable for mounting the housing in multiple mounting configurations. In a 19-inch mounting configuration, the longer of the first and second portions of the mounting bracket is secured to the sides of the housing, allowing the shorter portion to meet with the mounting rails on the rack-mount cabinet.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: October 8, 2002
    Assignee: Powerware Corporation
    Inventors: Andrew B. Johnson, George R. Davis, Glenn A. Priest
  • Patent number: 6459592
    Abstract: A VLSI package assembly comprising a package substrate carrying thereon an IC chip, a mother board supporting thereon the package substrate, and a connection means for providing electric connection between the substrate and the mother board. The connections means has a high durability against stresses thereby to keep its electric connection even in the face of difference in thermal expansions appearing within the package substrate and mother board.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: October 1, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasuhito Anzai
  • Patent number: 6456498
    Abstract: A CompactPCI-based computer system including a chassis and a mid-plane board. The mid-plane board forms bus circuitry, and is positioned between a front and back of the chassis. The chassis and the mid-plane board combine to define a plurality of CompactPCI form factor slots, including front slots and back slots. At least one of the front slots and at least one of the back slots are system slots configured to receive and provide independent bus connections for respective CompactPCI form factor system processor cards. In one preferred embodiment, the mid-plane board is configured to provide a bussed connector at a first front slot and at a second back slot, and a transition connection at a first back slot and a second front slot. With this one preferred embodiment, a one- or two-unit wide system processor card can be loaded into the first front slot, and another one- or two-unit wide system processor card can be loaded into the second back slot.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: September 24, 2002
    Assignee: Hewlett-Packard Co.
    Inventors: Thane M. Larson, Kirk Bresniker
  • Patent number: 6449168
    Abstract: The present invention refers to circuit board (10), in particular a multilayer circuit board including at least a first carrying section (11) and a second section (12), conductor pattern (17a, 17b, 17c) and via holes (14, 14b, 14c), at least one of the sections (11; 12) comprises at least one cavity (13a, 13b) for receiving a least one electric component (15), preferably a naked circuit, the second section (11, 12) constitutes a protective cover essentially hermetical sealing of the component (15). The circuit board (10) comprises substrates of a non ceramic material and that said substrates are protected against moisture penetrating in the transverse direction of the substrates by means scaling arranged at outer edges of the substrates.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: September 10, 2002
    Assignee: Telefonaktiebolaget LM Ericcson (publ)
    Inventor: Mats Söderholm
  • Patent number: 6449167
    Abstract: A method and system with a magnetically attractive breadboard and associated devices for constructing and testing electronic circuits. The breadboard can comprise a single or multi-layer circuit board with metallic foil conductors that can be connected to magnetically attractive pads. Electrical contacts between the pads and foil conductors can be made by wrapping the foil over an edge of insulating material. The insulating material can comprise a flexible insulation sheet with the desired circuit printed thereon. The electronic components are preferably supported by component holders which contain magnets that are attracted to the breadboard. The component holders facilitate attachment of the components to the foil conductors. A circuit can be built by selecting the desired component holder, plugging he component into the component holder, and then attaching the component holder to the breadboard on the proper foil conductor to complete the circuit.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: September 10, 2002
    Inventor: Arthur F. Seymour
  • Patent number: 6449165
    Abstract: A test socket connecting an integrated circuit chip to a printed circuit board is disclosed. The test socket includes a horizontal upper portion connected to the integrated circuit chip, a horizontal lower portion connected to the printed circuit board, and an intermediate portion connected between the horizontal upper portion and the horizontal lower portion.
    Type: Grant
    Filed: April 5, 2000
    Date of Patent: September 10, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Don Lee, Young-Jai Kim
  • Patent number: 6445595
    Abstract: In an operating component placement system for electronic equipment, assembly units (5) having cables (8) whereby operating components (6a to 6e) are connected to connectors (7a to 7e) are used to mount the operating components (6a to 6e) to a front panel (4), with connectors (7a to 7e) connected to connectors (3a to 3e) on a panel board (3) for signal input for various functions, and the cable lengths for operating component groups (6a to 6c) and (6d and 6e) having the same form established so as to be longer than the maximum distance between the connectors (3a to 3c) and (3d and 3e) to which each operating component group is to be connected on the panel board 3 and hole groups (4a to 4c) and (4d and 4e) for mounting each of the operating component groups to the front panel. Operating components having the same form can be selectively laid out by changing the cable positioning.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: September 3, 2002
    Assignee: Westwood Co., Ltd.
    Inventor: Hiroshi Okamoto
  • Patent number: 6445593
    Abstract: A chip type electronic component and a method of manufacturing the same reduces the steps necessary for applying an electrically conductive paste to define a first external electrode, a second external electrode and a third external electrode on the outer surface of an electronic component main body. External electrodes are provided around the side surfaces of the main body of the electronic component. The first external electrode is positioned on the first end surface of the main body, the second external electrode is positioned on the second end surface, the third external electrode is positioned between the first and second external electrodes. The first and second external electrodes are arranged to extend to edge portions of the first and second end surfaces, but exposing at least the approximate central portions of these end surfaces. In this way, the external electrodes are formed by applying the electrically conductive paste on the side surfaces of the main body.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: September 3, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Shingo Okuyama
  • Patent number: 6442035
    Abstract: A one-piece metal card cage has integral card guides provided by rows of formed projections that extend into the interior of the cage. The projections are hollow to provide ventilation openings through which air may flow to and from the interior of the cage. The card cage is fabricated from a one-piece sheet metal blank that is folded and joined together to provide top and bottom walls, opposite sidewalls, a backwall and a front opening.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: August 27, 2002
    Assignee: Marconi Communications, Inc.
    Inventors: Joseph C. Perry, Charles W. Atchison
  • Patent number: 6442045
    Abstract: A method for securing a contact assembly to a frame in an integrated circuit socket via cold forming. A plurality of posts are integrally formed with and extend from the bottom surface of the frame of an integrated circuit device socket. The contact assembly includes a plurality of conductive columns mounted within an insulating sheet in a predetermined contact pattern. The insulating sheet also has a plurality of post receiving apertures that are selectively positioned such that the posts extend through corresponding apertures in the insulating sheet when the contact assembly is positioned in a mounting position on the bottom surface of the frame. The posts are cold staked to expand the diameter of the post ends and to secure the contact assembly to the frame.
    Type: Grant
    Filed: November 7, 2001
    Date of Patent: August 27, 2002
    Assignee: Tyco Electronics Corporation
    Inventors: Jonathan W. Goodwin, Curtis G. Knaub
  • Patent number: 6442042
    Abstract: At least one CMOS component which is configured in a semiconductor substrate is part of the inventive circuit assembly. An insulating layer is configured on the semiconductor substrate. The insulating layer covers the CMOS component. A nanoelectronic component is configured above the insulating layer. At least one conducting structure is configured in the insulating layer and serves to link the nanoelectronic component with the CMOS component. If several nanoelectronic components are provided, they are preferably grouped to nano-circuit blocks. Each of the nano-circuit blocks is so small that the RC times of their lines do not exceed 1 ns.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: August 27, 2002
    Assignee: Infineon Technologies AG
    Inventors: Ties Ramcke, Lothar Risch, Wolfgang Rösner
  • Patent number: 6442046
    Abstract: A apparatus and a method of isolating two cavities within an electrical equipment by using a S-shaped plate having fingers on opposite sides such that the S-shaped plate may be installed between two open ended inner walls.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: August 27, 2002
    Assignee: Powerwave Technologies, Inc.
    Inventor: Scott B. Sauer
  • Patent number: 6437989
    Abstract: This circuit board contains electronic components having electrical contacts. At least one of the electrical contacts is initially glued to the circuit board using a conductive adhesive and at least one of the electrical contacts is connected to the circuit board by soldering. The circuit board is suitable for fast mechanical mass production. Further a method for the manufacture of the connection between the circuit board and the electronic components is disclosed, in which a solder is applied to soldering points and a conductive adhesive is applied to adhesive points. The circuit board with the components is then placed in a furnace to connect the components to the circuit board.
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: August 20, 2002
    Assignee: Endress + Hauser GmbH + Co.
    Inventors: Sergej Lopatin, Dietmar Birgel, Karl-Peter Hauptvogel
  • Patent number: 6430059
    Abstract: An integrated circuit package substrate. At least one insulating layer is formed between every two neighboring patterned wiring layers for isolation. At least a via is formed to penetrate through the insulating layers to electrically connect the patterned wiring layers. A capacitor is formed within at least one of the insulating layer. The capacitor has two electrodes insulated by a dielectric layer. One of the electrodes is connected to a power source, while the other is connected to ground.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: August 6, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Pin Hung, Jung-sheng Chiang
  • Patent number: 6430053
    Abstract: A pluggable transceiver module having a housing with a first side and a face perpendicular to the first side, and a tab extending beyond the surface of the first side, and the tab sized to mate with a slot in a receptacle of a host device for receiving the pluggable transceiver module housing, an elongated member slidably mounted to the first side of the housing and having an internal end and an external end, a wedge on the internal end of the elongated member, wherein sliding the elongated member inward causes the wedge to slide between the tab and the slot on the receptacle and remove the tab from within the slot, thereby releasing the pluggable transceiver module from the receptacle, and a lever rotatably mounted via an axle proximate the face of the pluggable transceiver module, said axle being connected to the external end of the elongated member such that rotating the lever away from the face of the pluggable transceiver cause the rotating axle to push the elongated member inward and drive the wedge bet
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: August 6, 2002
    Assignee: Stratos Lightwave
    Inventors: Bruce A. Peterson, Raul Medina, Frank J. Peterson