Abstract: A method and an apparatus for concealing an error of an apparatus for receiving an audio frame in a communication system are provided. The includes determining whether the error occurs in a current audio frame that is received from a transmitter, determining whether the audio frame includes a signal that corresponds to a preset specific frequency when the error occurs, setting a gain of the signal that corresponds to the specific frequency to be lower than a preset limit value if the audio frame includes the signal, and concealing the error of the current audio frame based on a previous audio frame of the audio frame in which the error occurs and the gain of the signal that corresponds to the set specific frequency.

Abstract: Example apparatus and methods support reconstructing an item from a set of erasure codes (e.g., fountain codes). Information about computer resources available to support reconstructing the item may be accessed and analyzed to control the spawning of multiple computer processes to support reconstructing the item. The information may include, for example, utilization and capacity data. The information may be provided by sensor agents that monitor the resources. The multiple computer processes may operate at least partially in parallel. Resources may be identified and computer processes may be spawned until all the resources that can contribute to the reconstruction are used. In one embodiment, computer processes may be spawned until the marginal utility of spawning another process falls below a threshold.

Abstract: A data storage device includes a controller operatively coupled to a non-volatile memory. The non-volatile memory includes a plurality of blocks. When the controller is configured to operate according to a first mode, a portion of a first redundancy block of the plurality of blocks stores first redundancy data corresponding to a first group of multiple data portions. The multiple data portions stored in multiple blocks of the plurality of blocks. When the controller is configured to operate according to a second mode, the portion of the first redundancy block stores second redundancy data corresponding to a single block of the plurality of blocks.

Abstract: According to one embodiment, a magnetic random access memory includes memory cells, a read circuit, (ECC) circuit, an address register, a flag register, a flag check circuit, and a write back circuit. The memory cells each include a magnetoresistive element. The address register stores the address at which the error has been detected by the ECC circuit. The data register stores corrected data in which the error has been corrected by the ECC circuit. The flag register sets an error flag in association with the address at which the error has been detected by the ECC circuit. The flag check circuit checks whether the error flag is set in the flag register. The write back circuit writes back the data to the memory cell designated by the address corresponding to the error flag.

Abstract: At a receiver side, to enhance the performance of concatenated LDPC and TCM coding, an iterative decoding between TCM decoder and LDPC decoder enables improvement in the reliability of received LLRs of each symbol after each iteration. A SOVA output of the TCM is used for LDPC decoding, and then the updated LLRs from LDPC decoder are further looped back to the TCM decoder for the next iteration. In such a manner, the decoding performance could be significantly improved after just several iterations.

Abstract: Apparatus and methods are disclosed, including a method of programming involving determining an error rate for the memory cells, and programming the memory cells using a charge state level for a charge state that is based at least in part on the determined error rate.

Abstract: A semiconductor device includes a memory device suitable for outputting health monitoring data including information on a threshold voltage distribution, and outputting read data read from memory cells included in the memory device, and a controller suitable for receiving a predetermined quantity of the read data from the memory device based on the health monitoring data, and performing a decoding operation for an error correction by using the received read data.

Abstract: One feature is a method of reading data from a plurality of pattern registers, generating a first output at a mapping register from the read data, generating a second output, different from the first output, at the mapping register from the read data, and generating a multi-level signal using the first and second outputs. In one embodiment, generating the first output is done by adding a first plurality of bits to a second plurality of bits, and generating the second output is done by adding the first plurality of bits to an inverse of the second plurality of bits.

Abstract: Audio clipping is prevented by attenuating an audio signal in accordance with values retrieved from a gain table. Corresponding amplitude values of a stereo audio signal are evaluated to determine a maximum of the values. The amount by which the maximum exceeds a predetermined threshold is used to calculate a table index, which is used to retrieve a gain value from the gain table. The gain value is then applied to the audio signal. The gain table is configured so that increasing index values produce decreasing gain values.

Abstract: A method of testing a semiconductor device includes forming a test circuit over a semiconductor substrate. The test circuit includes a plurality of interconnects electrically connected to a set of device structures supported by the semiconductor substrate. A test, such as a gate stress or leakage current test, of each device structure is conducted with the test circuit. The plurality of interconnects are removed after conducting the test.

Abstract: A bit interleaving method involves applying a bit permutation process to bits of a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N?/M folding sections (N? being a subset of N selected cyclic blocks and being a multiple of M/F), each of the constellation words being associated with one of the F×N?/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.

Abstract: A read out circuit for a sensor uses a feedback loop to bias the sensor to a desired operating point, such as the maximal possible sensitivity, but without the problem of an instable sensor position as known for the conventional read-out with constant charge. The reference bias to which the circuit is controlled is also varied using feedback control, but with a slower response than the main bias control feedback loop.

Abstract: An identification technique for physically damaged blocks of a flash memory of a data storage device. In the data storage device, a controller coupled to the flash memory writes data into the flash memory with at least one time stamp corresponding to the data. The time stamp is taken into consideration by the controller to identify the physically damaged blocks of the flash memory, and thereby it is prevented from erroneously identifying a physically undamaged block as bad. Thus, the flash memory is prevented from being erroneously regarded as a write protected memory. The lifespan of the flash memory is effectively prolonged.

Abstract: Apparatuses, methods, computer readable mediums, and systems are described for combined dynamic processing and speaker protection for minimizing distortion in audio playback. In some embodiments, at least one compressed audio signal is received, at least one threshold for a speaker is retrieved, modifications to audio signal compression are determined based on the at least one compressed audio signal and the at least one threshold, information embodying the modifications is transmitted to a dynamic processor, and using the dynamic processor, at least one modified compressed audio signal is produced for the speaker based on the information.

Abstract: A combination of repeaters and relays is used to improve the data throughput for user equipment (“UE”) near the cell edge in a LTE network. Amplify-and-forward repeaters and decode-and-forward relays enhance the down-link and up-link, respectively. Relay assistance on the up-link occurs when the evolved Node B (“eNB”) requests a retransmission (HARQ) from the UE at which point the UE and relay transmit simultaneously in a cooperative fashion. The quality of the up-link signal received by the eNB is improved due to a favorable channel through the relay. An analysis shows that relay assistance improves the throughput for a cell-edge user when the average delay per data transport block is allowed to increase.

Abstract: Systems and methods are provided for decoding data. A decoder includes a syndrome memory, a state memory, and decoding circuitry communicatively coupled to the syndrome memory and the state memory. The decoding circuitry retrieves data related to a symbol from the syndrome memory. The decoding circuitry also retrieves data related to the symbol from the state memory. The decoding circuitry processes the data retrieved from the syndrome memory and the data retrieved from the state memory to determine whether to toggle a value of the symbol. The determination is based at least in part on whether the symbol of the data being decoded was previously toggled from an original state.

Abstract: An earphone simultaneously allows high-level low-frequency sound and effective noise reduction. The earphone has a front cavity separated from ambient space The earphone has a housing having a wall separating a rear cavity with an acoustic compliance from the front cavity and from ambient space; a first diaphragm reciprocatably suspended across a first through hole in the housing wall between the front cavity and the rear cavity and adapted to be actively driven to provide the acoustic output signal; and a second diaphragm reciprocatably suspended in the housing wall between the rear cavity and ambient space where the acoustic resonant system is configured such that the resonance frequency is below 500 Hz. The second diaphragm attenuates acoustic signals entering the rear cavity from ambient space at frequencies above the resonance frequency and virtually increases the acoustic compliance of the rear cavity at frequencies below the resonance frequency.

Abstract: A sound generator includes a diaphragm including n sub-diaphragms (n, the amount of the sub-diaphragms); n voice coils corresponding to the sub-diaphragms; a signal source for outputting signals of n channels; n high-pass filters for receiving the signals of n channels and outputting n high frequency signals; n low-pass filters for receiving the signals of n channels and outputting n low frequency signals; a first mixer for mixing the n low frequency signals and then outputting a low frequency signal; and n second mixers for mixing the low frequency signal and the n high frequency signals, and then outputting n driving signals. The n driving signals actuates the n corresponding sub-diaphragms for producing stereo sounds.

Abstract: Techniques are presented that include determining, using signals captured from two or more microphones configured to detect an acoustic signal from one or more sound sources, one or more prominent sound sources based on the one or more sound sources. The techniques also include determining one or more directions relative to a position of one or more of the two or more microphones for prominent sound source(s). The techniques further include outputting information suitable to be viewed on a display, the information providing for the prominent sound source(s) a visual effect indicating at least in part the one or more directions, relative to a position of one or more of the microphones, of the prominent sound source(s) in the acoustic signal. The information and the corresponding visual effect(s) may be presented on a display, e.g., as part of a screensaver.

Abstract: A system method of detecting address-swap faults in a multiport memory as described herein includes minimum testing for inversion faults and bit-swap faults for each port of the multiport memory. Different test types may be performed for inversion and bit-swap including pass/fail, and diagnostic testing for locating faulty ports. Pass/fail testing may be used for identifying whether the IC is good or bad, and additional diagnostic testing using additional cycles may be used for disabling faulty ports or correcting inverted address bits. The test method may be implemented as a function test or as a memory built-in self-test. The test method may be used during manufacturing test or during function design verification.