Patents Examined by Dean Reichard
  • Patent number: 10184546
    Abstract: A planetary gear train of an automatic transmission for a vehicle is disclosed. The planetary gear train may include: an input shaft receiving torque of an engine; an output shaft outputting torque; a first planetary gear set including first, second, and third rotation elements; a second planetary gear set including fourth, fifth, and sixth rotation elements; a third planetary gear set including seventh, eighth, and ninth rotation elements; a fourth planetary gear set including tenth, eleventh, and twelfth rotation elements; a fifth planetary gear set including thirteenth, fourteenth, and fifteenth rotational elements. The planetary gear train improves power delivery performance and fuel economy by achieving ten forward speed stages and one reverse speed stage.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: January 22, 2019
    Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATION
    Inventors: Jin Ho Kim, Dong Hwan Hwang, Jong Sool Park, Jong Soo Kim, Kyeong Hun Lee
  • Patent number: 8134072
    Abstract: A superconductive cable includes a superconductive conductor (2), a dielectric (3) enclosing the latter and a superconductive screen (4) arranged over the dielectric acting as a spacer. The cable is enclosed with the inclusion of an air gap by a cryostat (7) which consists of a metal inner tube (8), a metal outer tube (9) and super insulation (10) arranged between them. An intermediate metal tube (5), which is closed all around over its entire length, is arranged over the screen (4) while leaving a gap (6) from the cryostat (7). A medium which is fluid at room temperature, and to which a constant pressure is applied, is introduced as an impregnating medium for the dielectric (3) into the space between the conductor (2) and the intermediate tube (5), and at least one refrigeration unit for supplying a liquid refrigerant is connected to the gap (6) between the cryostat (7) and the intermediate tube (5).
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: March 13, 2012
    Assignee: Nexans
    Inventors: Arnaud Allais, Frank Schmidt
  • Patent number: 7911800
    Abstract: Electrical apparatus is provided including a housing for containing one or more electrical components therein. The housing has at least one connector means (29) for allowing the connection of at least one electrical cable thereto. Channel means (28) are provided adjacent the connector means for containing at least a part of the electrical cable adjacent a connection end thereof which is to be connected to the connector means on the housing in use.
    Type: Grant
    Filed: May 24, 2004
    Date of Patent: March 22, 2011
    Assignee: Pace, Pic
    Inventor: Mark Andrew Smith
  • Patent number: 7791899
    Abstract: An installation and withdrawal apparatus (1) for the plugging in and withdrawal of a plug-in assembly into or out of an assembly support includes an installation and withdrawal handle (2) and a bearing element (3) about which the installation and withdrawal handle (2) can be rotated. The installation and withdrawal apparatus (1) further includes a holding element (4) to hold the installation and withdrawal handle (2) in a position suitable for plugging in the plug-in assembly, with the holding element (4) being arranged on the bearing element (3).
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: September 7, 2010
    Assignee: ELMA Electronic AG
    Inventor: Georg Heussi
  • Patent number: 7778038
    Abstract: The present invention relates to a power core comprising: at least one embedded surface mount technology (SMT) discrete chip capacitor layer comprising at least one embedded SMT discrete chip capacitor; and at least one planar capacitor laminate; wherein at least one planar capacitor laminate serves as a low inductance path to supply a charge to at least one embedded SMT discrete chip capacitor; and wherein said embedded SMT discrete chip capacitor is connected in parallel to said planar capacitor laminate.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: August 17, 2010
    Assignee: E.I. du Pont de Nemours and Company
    Inventors: David Ross McGregor, Daniel Irwin Amey, Jr., Sounak Banerji, William J. Borland, Karl Hartmann Dietz, Attiganal N. Sreeram
  • Patent number: 7773388
    Abstract: The present invention is to provide a printed wiring board in which malconnection or disconnection caused by a difference between coefficients of thermal expansion of a semiconductor chip and a printed wiring board can be decreased even when a highly-integrated semiconductor apparatus is mounted thereon and an electronic device using the same. An electronic device (4) according to the present invention includes a printed wiring board (1) with a component mounting pin (18) and a surface-mounting type semiconductor apparatus (2) with an electrode pad (3), wherein the component mounting pin (18) has elasticity and is urged against the electrode pad (3) to maintain electric connection.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: August 10, 2010
    Assignee: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Toshiki Furutani, Takeshi Kawanishi
  • Patent number: 7760513
    Abstract: Flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both of its major sides. The populated flexible circuitry is disposed proximal to a rigid substrate to place the integrated circuitry on one or both sides of the substrate with one or two layers of integrated circuitry on one or both sides of the substrate. The rigid substrate exhibits adhesion features that allow more advantageous use of thermoplastic adhesives with concomitant rework advantages and while providing flexibility in meeting dimensional specifications such as those promulgated by JEDEC, for example.
    Type: Grant
    Filed: April 3, 2006
    Date of Patent: July 20, 2010
    Assignee: Entorian Technologies LP
    Inventors: Julian Partridge, David Roper, Paul Goodwin
  • Patent number: 7688597
    Abstract: The present invention relates to a power supply circuit comprising at least one transformer which is connected to a primary side circuit and to a secondary side circuit. The present invention further relates to a method for producing such a power supply circuit. To provide an improved power supply circuit which has a reduced size and increased power density and offers more flexibility in the formation of the safety distances between primary side and secondary side, the primary side circuit and the secondary side circuit are each mounted on at least one separate circuit carrier, said circuit carriers being mechanically and electrically coupled to one another and arranged in at least two different planes. According to advantageous embodiments, said circuit carriers may be arranged in planes that are either parallel with or transverse to one another.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: March 30, 2010
    Assignee: Power Systems Technologies GmbH
    Inventors: Michael Bothe, Stefan Morbe, Michael Becks, Peter Grad
  • Patent number: 7684205
    Abstract: The present invention relates to a compliant leaded interposer for resiliently attaching and electrically connecting a ball grid array package to a circuit board. The interposer may include a substrate, a plurality of pads, and a plurality of pins. The plurality of pads may be positioned substantially on the top surface of the substrate and arranged in a predetermined pattern substantially corresponding to the solder ball pattern on the ball grid array package. The plurality of pins may be positioned substantially perpendicular to the substrate and may extend through the substrate and the plurality of pads. The interposer may be configured to attach the ball grid array package to the circuit board such that each of the solder balls on the ball grid array package contacts at least a portion the plurality of pins and at least a portion of the plurality of pads and such that the each of the plurality of pins also connects to a contact on the circuit board.
    Type: Grant
    Filed: February 22, 2006
    Date of Patent: March 23, 2010
    Assignee: General Dynamics Advanced Information Systems, Inc.
    Inventor: Deepak K. Pai
  • Patent number: 7675755
    Abstract: An LED module comprises: an LED element having an electrode for flip chip mounting; a wiring board having at least two metal layers and an electrically insulating layer including a polymer resin and being interposed between each two of the metal layers; and a metal film layer of the LED element for conducting heat from the LED element. A first metal layer of the at least two metal layers has a power supply metal pattern and a heat transfer metal pattern that are formed electrically insulated from each other. The power supply metal pattern and the electrode are connected to each other; the heat transfer metal pattern and the metal film layer are connected through an electrically insulating portion interposed therebetween; and the heat transfer metal pattern and the metal layers other than the first metal layer are coupled to each other through a heat transfer portion.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: March 9, 2010
    Assignee: Hitachi Cable, Ltd.
    Inventors: Noboru Imai, Shuichi Nakazawa, Aki Suzuki
  • Patent number: 7671282
    Abstract: A structure of a circuit board for improving the performance of routing traces is described as eliminating the resonant effects from the inner layers in a circuit board. For eliminating the stray capacitor effect between the planes in the circuit board, the present invention uses a method for etching an area of a power plane and the area is corresponding to a routing plane. Consequently, the routing trace can make good electric potential reference of a ground plane. Due to the reduction of the stray capacitor, the structure for improving the performance of routing traces of the invention can avoid the resonance effect and parasitic resonance in the circuit board as produced in a high-frequency situation in order to promote the quality of the circuit board.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: March 2, 2010
    Assignee: Via Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 7672137
    Abstract: A plasma display module that can optimize a position of an image board and connect an external image apparatus to a plasma display apparatus easily, and a plasma display apparatus including the plasma display module are disclosed. In one embodiment, the plasma display module includes: i) a chassis, ii) a plasma display panel supported by the chassis on a front portion of the chassis, the plasma display module comprising X electrodes and Y electrodes disposed parallel to each other, iii) an image board disposed on a rear portion of the chassis, and receiving and processing image signals input from an external device and iv) a Y electrode driving board disposed on the rear portion of the chassis, and electrically connected to the Y electrodes to apply the driving signals to the Y electrodes, wherein the Y electrode driving board and the image board are disposed on opposite sides of the chassis with respect to a center line crossing the chassis in a vertical direction.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: March 2, 2010
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Ki-Jung Kim, Myoung-Kon Kim
  • Patent number: 7672140
    Abstract: A circuit board configuration and method of packaging electronic component embedded into the circuit board in a manner that supports the electronic component thermally, electrically, and mechanically thereof, comprising a circuit board having a first surface and a circuit trace on the first surface; a recess or slot formed on the first surface defined by at least one sidewall that is oblique to the first surface of the circuit board; two or more plated surfaces on the at least one oblique sidewall and electrically connected to the circuit trace; and an electronic component having two or more electrical contact surfaces mounted to the two or more plated surfaces such that the electronic component is physically mounted to the oblique sidewall and in electrical communication with the circuit trace.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: March 2, 2010
    Assignee: Tensolite LLC
    Inventor: Bruce Lane
  • Patent number: 7667984
    Abstract: The present invention is directed to an apparatus for reducing and constraining EMI (electronic magnetic radiation) emissions without affecting the internals of data storage system components. A baffle is attached to the exterior of the housing of a data storage system component by baffle mounts. The baffle is operable between a closed position, where the baffle blocks EMI emitted by connectors on the data storage system component, and an open position, where the connectors are not blocked allowing for servicing and cable management. The baffle may comprise an EMI absorbing material and be tuned to meet specific EMI requirements. The baffle mounts offsets the baffle from the data storage system component and the baffle includes a number of holes to allow airflow. The adjustable EMI baffling apparatus does not interfere with other mounted components while the data storage system component is mounted in a cabinet.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: February 23, 2010
    Assignee: LSI Corporation
    Inventors: Justin Mortensen, Robert Harvey
  • Patent number: 7667981
    Abstract: A composite sandwich structure carrying an externally applied structural load and having embedded electronics, that in one embodiment includes two multilayered composite facesheet laminates, a central core, embedded electronic components within the central core region, embedded electrical conductors within the central core region, and two multilayer printed circuit laminates that are secondarily bonded or cured to the inner surface of the sandwich facesheet laminates. The electronic components and electrical conductors, which are located in the central core region of the sandwich element, are attached to one or both of the two circuit laminates.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: February 23, 2010
    Inventor: Barton E. Bennett
  • Patent number: 7667980
    Abstract: Printed circuit boards for countering signal distortion are disclosed that include: a conductive pathway on a printed circuit board between a transmitter and a receiver, the conductive pathway comprised of traces and vias connected together for conductive transfer of a signal from the transmitter to the receiver; a parasitic element on the printed circuit board, the parasitic element having a parasitic effect that distorts the signal; and one or more passive elements mounted adjacent to the conductive pathway without connecting to the conductive pathway, the passive elements having a corrective effect to reduce the distortion from the parasitic effect on the signal.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: February 23, 2010
    Assignee: International Business Machines Corporation
    Inventors: Brian A. Baker, James E. Hughes, Thomas D. Pahel, Jr., Pravin Patel, Challis L. Purrington, Christopher C. West
  • Patent number: 7667979
    Abstract: A protective circuit board for a battery pack for controlling charge and discharge states of the battery pack includes an insulation layer and a first signal pattern disposed inside the insulation layer. The circuit can further include a second signal pattern disposed inside the insulation layer. The circuit can include a first dummy pattern spaced from a first side of the first signal pattern and a second dummy pattern spaced from a second side of the first signal pattern.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: February 23, 2010
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Chang Yong Yun
  • Patent number: 7663891
    Abstract: In a lead frame board, while a heat radiation wall member formed by a resin having a relatively high thermal conductivity is provided in a low heat-resistance heat generating component mounting region where a low heat-resistance heat generating component is mounted, heat block wall members formed by resins having relatively low thermal conductivities are provided in a high heat-resistance heat generating component mounting region where a high heat-resistance heat generating component is mounted and in a non-heat generating component mounting region where a non-heat generating component is mounted. Thus, heat block is performed between the low heat-resistance heat generating component mounting region and the high heat-resistance heat generating component mounting region and non-heat generating component mounting region, and a heat radiation function is enhanced in the low heat-resistance heat generating component.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: February 16, 2010
    Assignee: Omron Corporation
    Inventors: Hirokazu Tanaka, Hiroyuki Ishibashi
  • Patent number: 7660129
    Abstract: There is provided a printed circuit board in which a PCB and an FPC can be readily located, a solder connection structure and method between a printed circuit board and a flexible printed circuit board. The printed circuit board 1 includes a plurality of pads 2 for mounting a flexible printed circuit board, wherein a solder resist 3 is formed on the surface of the printed circuit board so as to expose the pads 2 and convex portions are formed by insulation print layers 4 around the pads 2.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: February 9, 2010
    Inventors: Yuuji Minota, Yasuhiro Fukutomi, Motonobu Koike
  • Patent number: 7660128
    Abstract: A circuit package includes a circuit substrate having a cutout portion defined therein, an interconnect electrically coupled to the circuit substrate and an active circuit component disposed off the circuit substrate within the cutout portion and electrically coupled to the interconnect. An optical circuit includes a lead frame and an optical component electrically coupled to the lead frame. The lead frame includes a first lead portion at a first level having an upper surface and a lower surface, and a second lead portion at a second level lower than the first level and electrically connected to the first lead portion. The lower surface of the first lead portion is arranged to electrically connect to a surface of a circuit substrate. The second lead portion includes an upper surface and a lower surface. The optical component is disposed on the upper surface of the second lead portion.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: February 9, 2010
    Assignee: Emcore Corporation
    Inventors: Darren S. Crews, Lee L. Xu