Patents Examined by Diane E. Smith
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Patent number: 5280605Abstract: A speed governor for a microprocessor which prevents the operation above a selected frequency. Three resistors in a bridge network are switched capacitor "resistors" controlled by the input clocking signal. The value of the fourth resistor of the bridge is selected through connections to bonding pads. The bridge through a comparator disrupts the microprocessor's operation. The bondings also permit selection of an oscillator range and phase gap in the internal clocking signals.Type: GrantFiled: December 9, 1992Date of Patent: January 18, 1994Assignee: Intel CorporationInventors: Ian Young, Keng L. Wong
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Patent number: 5274766Abstract: A combination keyboard and keyboard/mouse controller system is capable of use with different types of personal computers, using either a keyboard input alone or a keyboard/mouse combination. The controller is configured with a hardware transceiver in it, and includes interconnections between an accumulator and a microsequencer portion and a transceiver for effecting the transfer of data to and from the computer and the keyboard or keyboard/mouse combination. The configuration of the controller circuitry is such that logic gates and multiplex transmission gates are employed between various ones of the input terminals to which signals are applied, and output terminals to which signals are provided. These gates interconnect at least some of these terminals in different combinations in different modes of operation of the controller system, depending upon whether a computer uses a keyboard alone as a data input device or is operated with a combination of a keyboard and mouse.Type: GrantFiled: September 14, 1990Date of Patent: December 28, 1993Assignee: VLSI Technology, Inc.Inventors: Marty L. Long, James Ward
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Patent number: 5247633Abstract: A method and apparatus are used to adapt a disk drive accessing system to access a maximum storage capacity of at least one disk drive. A Basic Input/Output System (BIOS) memory extension is carried by an adapter. The disk drive to be accessed is identified and address parameters for the disk drive are determined based on instructions in the BIOS extension. The address parameters correspond to the maximum storage capacity of the disk drive. The address parameters are determined by the disk drive accessing system and are suitable for being used by the accessing system in accessing the maximum storage capacity of the disk drive. The disk drive is then configured for being accessed using the address parameters.Type: GrantFiled: February 28, 1990Date of Patent: September 21, 1993Assignee: Seagate Technology, Inc.Inventors: Haim N. Nissimov, Brady Keays
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Patent number: 5247656Abstract: A data processing device includes first and second blocks which have different processing times and which operate in synchronism with a clock signal. One of the first and second blocks is selected and enabled in accordance with an instruction representing which of the first and second blocks should be selected and enabled. A clock change signal is generated on the basis of the instruction. A period of the clock signal is changed in accordance with the clock change signal.Type: GrantFiled: May 23, 1990Date of Patent: September 21, 1993Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideyuki Kabuo, Hisakazu Edamatsu, Takashi Taniguchi
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Patent number: 5247616Abstract: A computer system is disclosed in which different type of communication links are provided between different computers. A high speed data communication link between a personal computer (PC) and a midrange computer is disclosed. An application is run on the midrange computer, and simultaneously a different but related application is run on the PC. Then, the PC initiates a write command to write data from the PC to the midrange computer without prior direction from the midrange computer to initiate the write command. Next, the data is written into a buffer pool memory based on memory resident indicators whereby no channel program is required. This expedites the data transfer. The midrange computer application subsequently reads the data from the buffer pool memory. A master/slave relationship is also provided between the midrange computer and another computer or external device for more controlled data communications.Type: GrantFiled: April 27, 1992Date of Patent: September 21, 1993Assignee: International Business Machines CorporationInventors: Christina E. Berggren, Frank T. Kozuh
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Patent number: 5241667Abstract: An apparatus connecting a main controller for controlling an operation of an electric equipment and a sub controller for conducting a clock operation through a communication device is characterized in that the main controller generates a data having a predetermined period based on a reference clock and sends out the data through the communication device, and in that the sub controller receives the data sent from the main controller through the communication device and conducts a clock operation based on the period of the data. Because clock information is produced based on a communication period of the data from the main controller, the sub controller does not need a highly precise reference oscillator.Type: GrantFiled: October 31, 1991Date of Patent: August 31, 1993Assignee: Kabushiki Kaisha ToshibaInventor: Katsumi Matsumoto
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Patent number: 5237475Abstract: A magnetic head for photo-magnetic recording wherein an adaptor is attached to the distal end of a load beam, and a slider is joined to the adaptor via a flexure. A flat portion of the adaptor to which is attached the flexure is inclined at a given angle in the radial direction of a photo-magnetic disk, or the flat portion of the adaptor and a tongue of the flexure are inclined at respective given angles in the rotational direction of the photo-magnetic disk. The sliding mounting height is set optionally, a static attitude of the slider is held horizontally and stably, and the head is reduced in size and weight to permit high-speed access.Type: GrantFiled: January 14, 1993Date of Patent: August 17, 1993Assignee: Alps Electric Co., Ltd.Inventors: Toshio Kazama, Toshihiro Kuriyama
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Patent number: 5235699Abstract: A circuit that controls, calibrates and monitors critical timing parameters in a computer system or network to prevent loss of, or inaccurate data, when transferring this data.Type: GrantFiled: February 1, 1991Date of Patent: August 10, 1993Assignee: Micron Technology, Inc.Inventors: James M. Shaffer, Karl H. Mauritz, Henry D. Gerdes, Geary L. Leger
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Patent number: 5220635Abstract: A data sink periodically monitors for the arrival of data coming from a data source in a time interval and starts a data receiving procedure when data have arrived. The data sink includes a data processor for processing the received data, a first counter for counting the number of the received data, a second counter for measuring the period in which the data are received, and a data receiving circuit for receiving the data from the data source. The data receiving circuit periodically monitors for the arrival of data in the time interval and, when data have been received, transfers the received data to the processor. In an initial operating mode the receiving circuit calculates, based on the counted number of received data and the measured period, a predicted value defining the time interval for the data receiving circuit to periodically monitor for the arrival of data.Type: GrantFiled: September 30, 1991Date of Patent: June 15, 1993Assignee: Oki Electric Industry Co., Ltd.Inventor: Yoshihisa Kagaya
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Patent number: 5218583Abstract: An apparatus for continuously processing a plurality of optical cards in succession including a magazine having a plurality of racks on which a plurality of optical cards are placed, a table on which the magazine is detachably set, and a main body which supports the magazine movably up and down. On a side wall of the table is secured a rack extending vertically and a pinion is engaged with the rack. By driving the pinion, the table and thus the magazine is moved up and down so that a desired optical card can be indexed at a card discharging position. A driving roller is selectively caused to contact a side edge of the desired optical card through a window, and the optical card can be discharged from the magazine by rotating the driving roller. There is further provided a driving mechanism for feeding the optical card discharged from the magazine into an optical card utilizing device. After the optical card has been processed in the utilizing device, the optical card can be inserted into the magazine.Type: GrantFiled: April 9, 1991Date of Patent: June 8, 1993Assignee: Olympus Optical Co., Ltd.Inventor: Hiroshi Miyajima
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Patent number: 5214761Abstract: A device driver in a computer system being controlled by an application program has selectable algorithms for making desired changes to the signals produced by an external device. The signal changes are in addition to any changes which are needed for conforming the external device signals into a data structure required by the application. Selectable algorithms include a data filtering capability as well as a procedure to enhance the data produced by the external device.Type: GrantFiled: November 12, 1991Date of Patent: May 25, 1993Assignee: Wang Laboratories, Inc.Inventors: David M. Barrett, Kenneth C. Knowlton
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Patent number: 5208912Abstract: In a conferencing system including a plurality of workstations each having a multiwindow function connected to each other via a network, programs loaded in the respective workstations to control a conference are linked with each other through a logical circular control program's path. A data item inputted from a workstation not having a data effectuation floor qualification is transmitted as a data item in an ineffective state to a next workstation. When received by a workstation possessing the effectuation floor qualification, the data in the ineffective state is converted into an effective data. In each station, application programs and utility programs are responsive only to the data in the effective state, which guarantees the identity of results of data processing achieved in the respective workstations.Type: GrantFiled: November 15, 1990Date of Patent: May 4, 1993Assignee: Hitachi, Ltd.Inventors: Yoshiyuki Nakayama, Kenjiro Mori, Tadashi Yamamitsu
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Patent number: 5197129Abstract: An input/output device has a processor which processes data strings received by the device. When a data string is received, it is passed to a serial interface and a timing means. The serial interface generates a signal which interrupts the existing processing by the processor and causes the process to start processing of the newly received data string. At the same time the timing means measures the length of the data string and compares it with a predetermined length set by user-controllable data setting means. If the data string length reaches the predetermined length, the processor is triggered to stop processing the new data string and to recommence the processing it was performing prior to interruption. The unprocessed part of the new data string is stored in a memory.In this way, urgent data strings, which are generally short, are processed rapidly and longer data strings are processed after the urgent data strings.Type: GrantFiled: August 28, 1990Date of Patent: March 23, 1993Assignee: Hitachi, Ltd.Inventors: Masahiro Kayama, Yasuo Morooka, Takayuki Oshiga, Katsuhiro Fujiwara
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Patent number: 5197128Abstract: A packet-based communication system is described for linking a peripheral unit (PU) to the outside world via a communications link. The system includes a modular interface unit (MIU) which has a memory shared by processors in both the PU and MIU. The system employs control packets, read packets and write packets and performs a method for allocating the shared memory that optimizes memory utilization. The system determines a ratio of read to write packets required in the operation of the PU, and it ignores that ratio if the communications link will not transmit write packets. If the communication link will transmit write packets, it allocates read and write packet space within the shared memory in accordance with the ratio. The system also includes apparatus for enabling MIU configuration via user/keyboard inputs through the PU with the MIU providing the question and answer messages.Type: GrantFiled: March 4, 1991Date of Patent: March 23, 1993Assignee: Hewlett-Packard CompanyInventors: Russell Campbell, Todd A. Fischer, Patrick W. Fulghum, Paul R. Sorenson, James G. Wendt