Abstract: An on-chip testing device separately locates must-repairs or preferred-repairs in a row direction and column direction of a memory array. A row counter and a column counter are operated to index the memory array in row-major order, and then in column-major order (or vice versa). A running total of the number of failures is kept for each row and column, when the running total equals or exceeds a predetermined value, the row or column is determined to be a must-repair or a preferred repair. Rows to be repaired are substituted with redundant memory rows and columns to be prepared are substituted with redundant memory columns.