Abstract: A circuit, including: a capacitor coupled between a first circuit node and a second circuit node and that leaks a leakage current from the first circuit node to the second circuit node; and a compensation circuit adapted to supply a compensatory current to compensate for the leakage current to the first circuit node.

Abstract: A Phase-Locked Loop is provided that includes a main loop, a calibration loop, and Control Logic. The main loop comprises, coupled in series, a Phase Frequency Detector, a Main Charge Pump, a Main Loop Filter, a Voltage Controlled Oscillator and a Frequency Divider. The calibration loop is coupled to the Phase Frequency Detector and comprises a Calibration Charge Pump and a Calibration Loop Filter. The Control Logic controls the Frequency Divider and receives a control input signal. A Reference Frequency Signal is coupled to the Phase Frequency Detector and the Control Logic, and a calibration signal is coupled to the calibration loop. Additionally, the main loop further comprises a delay generator controlled by the Control Logic and arranged to receive correction signals from the calibration loop and to send an output signal to the Phase Frequency Detector.

Abstract: An R-C polyphase network that provides bandpass shaping and amplification to maintain the quadrature phase output is provided. In one implementation, a polyphase device comprises two transistors each having a collector, a base and an emitter. Positive and negative components of an input signal are coupled to a respective base of the transistors, the transistors adapted to drive the R-C polyphase network. Inputs of the R-C polyphase network are coupled to the collectors of the transistors. The R-C polyphase network includes an inductor and has first output and a second output offset in phase. The inductor is adapted to provide bandpass filtering of the first output and the second output to reduce harmonics and spurious content in the output, as well as provide amplification of the outputs relative to the input signal.

Abstract: The present invention relates to an adjustable clock skew apparatus and method for generating clock signals, which resolves the drawbacks of costing a user much time and effort to adjust clock skews of all components on a motherboard. In order to accomplish the object, the present invention proposes three operating modes: hardware setup, software setup or a mixture of hardward and software setup. A user just needs to adjust a plurality of exterior switches or to adjust a Basic Input Output System (BIOS) of the motherboard to modify the parameter of clock skew, and clock signals with necessary clock skews will be obtained.

Abstract: Disclosed is a current booster or kicker for an output amplifier of a programmable logic control or other integrated circuit. The current booster includes a control mechanism and an auxiliary voltage supply. When a change in output state is initiated, the control mechanism connects the auxiliary voltage supply to the output of the output amplifier. After a change in output state in completed, the control mechanism disconnects the auxiliary voltage supply from the output of the output amplifier. In this way, the output amplifier can drive a relatively high capacitance load at a relatively high slew rate.