Patents Examined by Doris King
  • Circuit configuration for enabling a clock signal in a manner dependent on an enable signal
    Patent number: 6573754
    Abstract: A circuit configuration for enabling a clock signal in a manner dependent on an enable signal has first and second signal paths that are fed to a NAND gate. The second signal path contains an RS flip-flop, upstream of which NAND gates are connected, which, for their part, are connected via different inverters to the input terminals for the clock signal and the enable signal, respectively.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: June 3, 2003
    Assignee: Infineon Technologies AG
    Inventors: Ullrich Menczigar, Patrick Heyne