Abstract: An optical sensor is provided, comprising (a) a silicon nanowire of finite length having an electrical contact pad at each end thereof; and (b) a plurality of self-assembled molecules on a surface of the silicon nanowire, the molecules serving to modulate electrical conductivity of the silicon nanowire by either a reversible change in dipole moment of the molecules or by a reversible molecule-assisted electron/energy transfer from the molecules onto the silicon nanowire. Further, a method of making the optical sensor is provided. The concept of molecular self-assembly is applied in attaching functional molecules onto silicon nanowire surfaces, and the requirement of molecule modification (hydroxy group in molecules) is minimal from the point view of synthetic difficulty and compatibility. Self-assembly will produce well-ordered ultra-thin films with strong chemical bonding on a surface that cannot be easily achieved by other conventional methods.

Abstract: Disclosed are a chip scale package and a method of fabricating the chip scale package. The chip scale package comprises an insulating layer formed on the upper surface of a chip provided with a plurality of terminals on its one surface, a plurality of conductive layers formed on the insulating layer and spaced from each other by a designated distance so as to be connected to each of a plurality of the terminals, and a plurality of electrode surfaces formed on each of the upper surfaces of a plurality of the conductive layers. The chip scale package is miniaturized in the whole package size. Further, the method of fabricating the chip scale package does not require a wire-bonding step or a via hole forming step, thereby simplifying the fabrication process of the chip scale package and improving the reliability of the chip scale package.

Abstract: A semiconductor device includes a mount substrate, a high-frequency transmission line provided on a top surface of the mount substrate, and a semiconductor chip mounted on the top surface of the mount substrate in a facedown state in electrical contact with the high-frequency transmission line, wherein there is formed a depression on the top surface of the mount substrate.

Abstract: The invention is directed to a programmable IC (integrated circuit) arrangement. Included are: at least one input/output terminal; at least two receiver/source terminals for selectable electrical connection to the at least one input/output terminal; and a plurality of layers electrically interconnected with one another and providing electrical connection between the at least one input/output terminal and at least one of the at least two receiver/source terminals. At least a sub-plurality of the plurality of layers includes electrically conductive components selectably providable at at least two positions so as to selectably program electrical connection between the at least one input/output terminal and the at least two receiver/source terminals. The selectably providable electrically conductive components include ones of selectably providable vias, switch-contacts and well regions.

Abstract: Disclosed is an electroabsorption-type optical modulator, which has: a semiconductor substrate; and a semiconductor buffer layer, a semiconductor optical absorption layer and a semiconductor cladding layer which are layered in this order on the semiconductor substrate; wherein the absorption of a light wave supplied to an end of the semiconductor optical absorption layer is controlled by changing an intensity of electric field applied to the semiconductor optical absorption layer; and the semiconductor optical absorption layer has a region with absorption-edge wavelength shorter than that of the other region of the semiconductor optical absorption layer and a voltage corresponding an external electrical signal is simultaneously applied to both the regions of the semiconductor optical absorption layer, so that, to an incident light, a refractive index of the semiconductor optical absorption layer is decreased and an absorption coefficient of the semiconductor optical absorption layer is increased when an inten

Abstract: Systems and methods are described for fabricating arrays of quantum dots. A method for making a quantum dot device, includes: forming clusters of atoms on a substrate; and charging the clusters of atoms such that the clusters of atoms repel one another. The systems and methods provide advantages because the quantum dots can be ordered with regard to spacing and/or size.

Abstract: An integrated circuit (IC) header subassembly includes a spacer mounted to the header. The IC die assembly, consisting of an IC die or IC die carrier assembly, is mounted to spacer which is mounted to the header. The coefficient of thermal expansion of the spacer is selected to be between the coefficient of thermal expansion of the IC die assembly and the header minimize stresses due to thermal expansion and contraction. In addition, the spacer is substantially smaller in width and length and the IC die assembly and the header whereby the IC die assembly appears to be pedestal mounted. By minimizing the length of the contacting surfaces between the spacer and the IC die assembly, the risk of warping or cracking due to differences in thermal expansion can be reduced. This allows for much larger IC dies and pixel arrays to be used.

Abstract: A compound semiconductor device includes a low resistance source and drain region covered by a protective layer of a compound semiconductor device carrying thereon a source electrode or a drain electrode. Further, a low resistance source and drain region formed by a regrowth process of a compound semiconductor material is disclosed.

Abstract: A superluminescent diode having emission layers which emit different wavelengths of light disposed side-by-side whereby light emitting in a first direction from an emission layer having a longer wavelength than an adjacent layer in the first direction is not absorbed. Thus, light of the different wavelengths is represented in an output spectra in the first direction at a point beyond the adjacent layer. A semiconductor optical amplifier is formed by creating a symmetrical structure in which the longest wavelength material is grown in the center and the shortest wavelength material is grown near the facets.

Abstract: A method of forming a crystalline silicon well over a perovskite barrier layer, preferably for use in formation of a resonant tunneling diode. A silicon substrate (1) is provided of predetermined crystallographic orientation. A layer of crystallographic perovskite material (5) is formed over the silicon substrate and substantially matched to the lattice constant of the silicon substrate. A layer of crystallographic silicon (7) is formed over the perovskite layer substantially matched to the lattice constant of the perovskite layer. The perovskite layer is formed by the steps of placing the silicon substrate in a chamber and then evaporating a layer of barium strontium oxide (3) thereon with a thickness of from about three to about six Angstroms and then evaporating a layer of calcium strontium titanate (5) thereon having a thickness of from about six to about 25 Angstroms thereon in the case of a tunneling diode.

Abstract: A fabrication method of a semiconductor laser capable of controlling a polarization mode of output light is disclosed. In the fabrication method, after two laser portions are independently formed, the laser portions are positioned to be optically coupled to each other. In another fabrication method of the laser, after at least portions of two laser portions are separately formed, an irregularly-formed portion at a boundary portion therebetween is removed. The fabrication method can be facilitated and a degree of freedom in the polarization control can be increased, since the two laser portions are separately formed.

Abstract: A controllable magnetic field generator applies a magnetic field to a transistor device at a particular orientation for producing a corresponding Lorentz force on the flow of carriers in the device to advantageously deflect the carriers to facilitate performance of a corresponding desired circuit function. Such a component arrangement is useable in a variety of circuit configurations for performing different circuit functions with a reduced number of devices and complexity relative to conventional circuit configurations. Exemplary circuit configurations for signal mixers, differential amplifiers, switches, and multiplexers and demultiplexers are possible using as little as one or two devices. According to another aspect of the invention, an inductor coil is used for the magnetic field generator and is formed on a substrate containing the transistor device to provide a component arrangement having relatively compact dimensions.

Abstract: A metal foil material for covering a semiconductor device, a semiconductor device covered with the metal foil material, and a process for producing the metal foil-covered semiconductor device are disclosed. The metal foil material is one which is, in molding a resin for encapsulating a semiconductor element using a mold, temporarily fixed on a surface of a cavity of the mold, and is adhered on a surface of a semiconductor device by injecting the encapsulating resin into the mold and molding the resin, wherein a contact angle of the face of the metal foil material which is in contact with the encapsulating resin during molding, to water is 110.degree. or less.

Abstract: An integrated digital circuit is protected from reverse engineering by fabricating all transistors of like conductivity with a common size and geometric layout, providing a common layout for different logic cells, connecting doped circuit elements of like conductivity with electrically conductive doped implants in the substrate rather than metalized interconnections, and providing non-functional apparent interconnections that are interrupted by non-discernable channel stops so that all cells falsely appear to have a common interconnection scheme. The camouflage is enhanced by providing a uniform pattern of metal leads over the transistor array, with a uniform pattern of heavily doped implant taps from the transistors for connection to the leads; undesired tap-lead connections are blocked by channel stops.

Abstract: In a power semiconductor component a ceramic substrate (SUB) and a metallic baseplate (BP) are connected, in order, via a connecting layer (2), a buffer layer (DP) made of a material having a low yield point and high thermal conductivity as well as a further connecting layer (3). The mechanical connections between the ceramic substrate and the baseplate have a high shear strength. Premature material fatigue and cracking on account of the different thermal expansion of the ceramic substrate and the baseplate are avoided by means of plastic deformation of the buffer layer. Connecting layers are, for example, sintered silver powder layers such as are advantageously used in the low-temperature connection technique for power semiconductor components.